Namespace simtix
Namespaces
Type | Name |
---|---|
namespace | mem |
namespace | opencl |
namespace | pipelined |
namespace | riscv |
namespace | sim |
namespace | stat |
namespace | system |
namespace | trace |
namespace | utils |
namespace | uvm |
Classes
Type | Name |
---|---|
class | ArchParam |
class | ArchParamBuilder |
class | AtomicArbitrator |
class | AtomicLoadStoreUnit |
class | AtomicSM |
class | AtomicSMImpl |
class | BaseArbitrator |
class | BaseFunctionUnit |
class | BaseLoadStoreUnit |
class | BaseSM Base class for all Streaming Multiprocessor (SM) implementations. |
class | BaseSMImpl Base class for the Streaming Multiprocessor (SM) implementation. |
class | CoalescingLoadStoreUnit |
class | FixedLatencyUnit |
class | Gto |
class | Instr Base class for all different kinds of Instructions. |
class | InstrAuipc InstrAuipc handles the operations for instruction with AUIPC opcode. |
class | InstrBranch InstrBranch handles the operations for instruction with BRANCH opcode. |
class | InstrFormosa InstrFormosa handles the operations for CUSTOM-1 opcode instructions. |
class | InstrJal InstrJal class handles the operations for instruction with JAL opcode. |
class | InstrJalr InstrJalr handles the operations for instruction with JALR opcode. |
class | InstrLoad InstrLoad handles the operations for instruction with LOAD opcode. |
class | InstrLui InstrLui handles the operations for instruction with LUI opcode. |
class | InstrOp InstrOp class handles the operations for instruction with OP opcode. |
class | InstrOp32 InstrOp32 class handles the operations for OP-32 opcode instructions. |
class | InstrOpFp |
class | InstrOpFused |
class | InstrOpImm InstrOpImm handles the operations for instructions with OP-IMM opcode. |
class | InstrOpImm32 InstrOpImm32 handles the operations for OP-IMM-32 opcode instructions. |
class | InstrPool <class InstrType> InstrPool manages the allocation and recycling of instruction objects. |
class | InstrPoolInterface Interface class for different <Instr> type of pool. |
class | InstrPtr Pointer to the <Instr> object. |
class | InstrQueue InstrQueue is a SizedQueue containingInstrPtr . |
class | InstrStore InstrStore handles the operations for instruction with STORE opcode. |
class | InstrSystem InstrSystem class handles the operations for instruction with SYSTEM. |
class | InstrTrap <TException> template class for RISC-V exception code. |
class | Lrr |
class | PipelinedArbitrator |
class | RRWarpSched |
class | Thread Class for thread. |
class | Warp Class for warp. |
class | WarpSched |
Public Types
Type | Name |
---|---|
typedef InstrTrap< riscv::Exceptions::INSTRUCTION_ACCESS_FAULT > | InstrAccessFault Alias for InstrTrap<riscv::Exceptions::INSTRUCTION_ACCESS_FAULT>. |
typedef InstrTrap< riscv::Exceptions::INSTRUCTION_ADDR_MISALIGNED > | InstrAddrMisaligned Alias for InstrTrap<riscv::Exceptions::INSTRUCTION_ADDR_MISALIGNED>. |
typedef InstrTrap< riscv::Exceptions::ILLEGAL_INSTRUCTION > | InstrIllegal Alias for InstrTrap<riscv::Exceptions::ILLEGAL_INSTRUCTION>. |
enum | SMType |
Public Attributes
Type | Name |
---|---|
const ArchParam | kDefaultArchParam = ArchParam::Build() |
Public Functions
Type | Name |
---|---|
uint32_t | bit_width (T value) |
constexpr T | saturate_cast (U value) noexcept |
Public Types Documentation
typedef InstrAccessFault
Alias for InstrTrap<riscv::Exceptions::INSTRUCTION_ACCESS_FAULT>.
Type: InstrAccessFault
typedef InstrAddrMisaligned
Alias for InstrTrap<riscv::Exceptions::INSTRUCTION_ADDR_MISALIGNED>.
using simtix::InstrAddrMisaligned = typedef InstrTrap<riscv::Exceptions::INSTRUCTION_ADDR_MISALIGNED>;
Type: InstrAddrMisaligned
typedef InstrIllegal
Alias for InstrTrap<riscv::Exceptions::ILLEGAL_INSTRUCTION>.
Type: InstrIllegal
enum SMType
Public Attributes Documentation
variable kDefaultArchParam
Public Functions Documentation
function bit_width
function saturate_cast
The documentation for this class was generated from the following file projects/simtix/include/simtix/clocked.h