Class Hierarchy

This inheritance list is sorted roughly, but not completely, alphabetically:

• class simtix::ArchParam
• class simtix::ArchParamBuilder
• class simtix::BaseArbitrator
  • class simtix::AtomicArbitrator
  • class simtix::PipelinedArbitrator
• class simtix::BaseFunctionUnit
  • class simtix::BaseLoadStoreUnit
    • class simtix::AtomicLoadStoreUnit
    • class simtix::CoalescingLoadStoreUnit
  • class simtix::FixedLatencyUnit
• class simtix::sim::Clocked Abstract base class for tick-driven simulation objects.
  • class simtix::sim::GenericDelayQueue
  • class simtix::sim::GenericDelayQueue
  • class simtix::AtomicLoadStoreUnit
  • class simtix::BaseSM Base class for all Streaming Multiprocessor (SM) implementations.
    • class simtix::AtomicSM
    • class simtix::pipelined::PipelinedSM
  • class simtix::CoalescingLoadStoreUnit
  • class simtix::mem::MemoryInterface An abstract class for all objects that have a read/write memory interface.
    • class simtix::mem::BankedMemory A banked memory implementation.
    • class simtix::mem::CacheInterface Abstract interface for cache implementations.
      • class simtix::mem::Cache A cache implementation.
      • class simtix::mem::NBHBCache Non-blocking high-bandwidth cache implementation.
    • class simtix::mem::SimpleMemory A simple memory implementation with fixed latency.
    • class simtix::mem::XBar Crossbar for connecting multiple memory interfaces.
  • class simtix::sim::GenericDelayQueue
  • class simtix::system::TaskDispatcher Task dispatcher for managing workgroups and SMs.
  • class simtix::trace::KonataRetireReporter
  • class simtix::uvm::FrontendGolden
• class simtix::BaseSMImpl Base class for the Streaming Multiprocessor (SM) implementation.
  • class simtix::AtomicSMImpl
    • class simtix::AtomicSM::Impl
  • class simtix::pipelined::PipelinedSMImpl Integrate all stages to construct the pipelined SM implementation.
    • class simtix::pipelined::PipelinedSM::Impl Internal implementation wrapper for public PipelinedSM interface.
    • class simtix::uvm::FrontendGoldenImpl
      • class simtix::uvm::FrontendGolden::Impl
• class simtix::WarpSched
  • class simtix::RRWarpSched
    • class simtix::Gto
    • class simtix::Lrr
• class simtix::Instr Base class for all different kinds of Instructions.
  • class simtix::InstrAuipc InstrAuipc handles the operations for instruction with AUIPC opcode.
  • class simtix::InstrBranch InstrBranch handles the operations for instruction with BRANCH opcode.
  • class simtix::InstrFormosa InstrFormosa handles the operations for CUSTOM-1 opcode instructions.
  • class simtix::InstrJal InstrJal class handles the operations for instruction with JAL opcode.
  • class simtix::InstrJalr InstrJalr handles the operations for instruction with JALR opcode.
  • class simtix::InstrLoad InstrLoad handles the operations for instruction with LOAD opcode.
  • class simtix::InstrLui InstrLui handles the operations for instruction with LUI opcode.
  • class simtix::InstrOp InstrOp class handles the operations for instruction with OP opcode.
    • class simtix::InstrOp32 InstrOp32 class handles the operations for OP-32 opcode instructions.
  • class simtix::InstrOpFp
  • class simtix::InstrOpFused
  • class simtix::InstrOpImm InstrOpImm handles the operations for instructions with OP-IMM opcode.
    • class simtix::InstrOpImm32 InstrOpImm32 handles the operations for OP-IMM-32 opcode instructions.
  • class simtix::InstrStore InstrStore handles the operations for instruction with STORE opcode.
  • class simtix::InstrSystem InstrSystem class handles the operations for instruction with SYSTEM.
  • class simtix::InstrTrap template class for RISC-V exception code.
• class simtix::InstrPoolInterface Interface class for different <Instr> type of pool.
  • class simtix::InstrPool InstrPool manages the allocation and recycling of instruction objects.
• class simtix::InstrPtr Pointer to the <Instr> object.
• class simtix::Thread Class for thread.
• class simtix::Warp Class for warp.
• class simtix::mem::BankedMemory::Impl
• class simtix::mem::CacheImpl
  • class simtix::mem::Cache::Impl
• class simtix::mem::DataArray
• class simtix::mem::MshrFile
• class simtix::mem::NBHBCacheImpl
  • class simtix::mem::NBHBCache::Impl
• class simtix::mem::SimpleMemory::Impl
• class simtix::mem::TagArray
• class simtix::mem::XBar::Impl
• class simtix::pipelined::CommitStage Commit the instruction.
• class simtix::pipelined::DecodeStage Decode the instruction.
• class simtix::pipelined::ExecuteStage Execute the instruction.
• class simtix::pipelined::FetchBuf Implement a buffer for fetching instructions.
• class simtix::pipelined::FetchStage Handle the instruction fetch.
• class simtix::pipelined::InstrBuffer A instruction buffer.
  • class simtix::uvm::MockInstrBuffer
• class simtix::pipelined::OperandCollectStage Collect operand from banked register file.
• class simtix::pipelined::PCGenStage Fetch request generation stage.
• class simtix::pipelined::PipelinedSM::Param
• class simtix::pipelined::PipelinedSM::ParamBuilder
• class simtix::pipelined::ScheduleStage Schedule the warp.
• class simtix::stat::StatBase All visible stat objects will inherit this base class.
  • class simtix::stat::Formula
  • class simtix::stat::Vector
  • class simtix::stat::Formula
  • class simtix::stat::ScalarBase
    • class simtix::stat::Scalar
    • class simtix::stat::Vector::Reduction
      • class simtix::stat::Vector::Average
      • class simtix::stat::Vector::Sum
  • class simtix::stat::Vector
• class simtix::stat::Group
  • struct simtix::BaseSMImpl::Stat
    • struct simtix::AtomicSMImpl::Stat
    • struct simtix::pipelined::PipelinedSMImpl::Stat
  • struct simtix::BaseSMImpl::WorkGroupStat
    • struct simtix::AtomicSMImpl::WorkGroupStat
    • struct simtix::pipelined::PipelinedSMImpl::WorkGroupStat
  • struct simtix::PipelinedArbitrator::Stat
  • struct simtix::WarpSched::Stat
  • struct simtix::mem::BankedMemory::Impl::Stat
  • struct simtix::mem::CacheImpl::Stat
  • struct simtix::mem::NBHBCacheImpl::Stat
  • struct simtix::system::SingleCoreSystem::SingleCoreSystemStat
• class simtix::stat::PostfixExpr
• class simtix::system::BaseSystem Base class for all system implementations.
  • class simtix::system::SingleCoreSystem
• class simtix::system::TaskDispatcherImpl
  • class simtix::system::TaskDispatcher::Impl
• class simtix::trace::KonataTracer Dump Konata traces to a given std::ostream. This class is a singleton class and only one instance will exist in a program. Users should dump the trace with <KONATA>.
• class simtix::trace::OstreamTracer Dump traces to a given std::ostream. This class is a singleton class and only one instance will exist in a program. Users should dump the trace with <DDUMP> or <DPRINTF>.
• class tb::Testbed
• struct MemConfig
• struct SimConfig
• struct simtix::AtomicLoadStoreUnit::Request
• struct simtix::BaseSM::FaultStatus
• struct simtix::BaseSMImpl::Barrier
• struct simtix::CoalescingLoadStoreUnit::CoreRequest
• struct simtix::CoalescingLoadStoreUnit::MemRequest
• struct simtix::PipelinedArbitrator::Request
• struct simtix::mem::BankedMemory::Param
• struct simtix::mem::Cache::Param
• struct simtix::mem::Cache::Param::NonCacheableEntry
• struct simtix::mem::CacheImpl::CoreRequest
• struct simtix::mem::CacheImpl::DataArrayRequest
• struct simtix::mem::CacheImpl::MemResponse
• struct simtix::mem::CacheImpl::WriteBufferEntry
• struct simtix::mem::MemoryInterface::Payload
• struct simtix::mem::MshrFile::MSHR
• struct simtix::mem::SimpleMemory::Impl::Request
• struct simtix::mem::SimpleMemory::Param
• struct simtix::mem::TagArray::Rep
• struct simtix::mem::TagArray::Tag
• struct simtix::mem::XBar::Impl::slave_t
• struct simtix::opencl::Kernel
• struct simtix::opencl::WorkGroup
• struct simtix::pipelined::FetchBuf::Entry Represent a single fetch buffer entry containing fetched instructions and control data.
• struct simtix::pipelined::InstrBuffer::InstrStream Represent the instruction stream for a single warp.
• struct simtix::pipelined::PCGenStage::FetchFilterEntry
• struct simtix::system::SingleCoreSystem::Config
• struct simtix::system::SingleCoreSystem::Config::Mem
• struct simtix::system::TaskDispatcher::CompletionInfo
• struct simtix::trace::KonataRetireReporter::InstrRetire
• struct simtix::uvm::FrontendGolden::Input
• struct simtix::uvm::FrontendGolden::Output
• class std::deque< T, std::allocator< T > >
  • class simtix::sim::SizedQueue
  • class simtix::sim::SizedQueue
  • class simtix::sim::SizedQueue
  • class simtix::sim::SizedQueue
  • class simtix::sim::SizedQueue
• class formatter< string_view >
  • struct fmt::formatter< simtix::ArchParam::WarpSchedPolicies >
  • struct fmt::formatter< simtix::BaseSM::Status >
  • struct fmt::formatter< simtix::SMType >
  • struct fmt::formatter< simtix::mem::Cache::Param::ReplacementPolicies >
  • struct fmt::formatter< simtix::mem::Cache::Param::WriteHitPolicies >
  • struct fmt::formatter< simtix::mem::Cache::Param::WriteMissPolicies >
  • struct fmt::formatter< simtix::mem::MemType >
  • struct fmt::formatter< simtix::stat::Operation >
  • struct fmt::formatter< simtix::system::TaskDispatcher::CompletionInfo::Status >
  • struct fmt::formatter< simtix::system::TaskDispatcher::Status >