Class simtix::uvm::MockInstrBuffer

ClassList > simtix > uvm > MockInstrBuffer

Inherits the following classes: simtix::pipelined::InstrBuffer

Public Functions

Type	Name
	MockInstrBuffer (PipelinedSMImpl * sm, const ArchParam & p=kDefaultArchParam, const PipelinedSM::Param & pp=PipelinedSM::kDefaultParam)
void	PutTestInput (std::vector< bool > capacious_warps, std::vector< uint64_t > fetch_pc)
void	ResetTestInput ()
virtual bool	capacious (uint32_t wid, std::optional< uint32_t > ssw) override const Check if the instruction stream can accommodate more instructions.
bool	empty (uint32_t wid, std::optional< uint32_t > ssw) const
virtual uint64_t	fetch_pc (uint32_t wid, std::optional< uint32_t > ssw) override const Get the current fetch PC.
	~MockInstrBuffer () = default

Public Functions inherited from simtix::pipelined::InstrBuffer

See simtix::pipelined::InstrBuffer

Type	Name
bool	CanEnq (const InstrPtr & instr) const Check if an instruction can be enqueued.
InstrPtr	Deq (uint32_t wid, std::optional< uint32_t > ssw) Dequeue an instruction from a warp's instruction stream.
void	Disable (uint32_t wid) Disable a warp’s instruction buffer when encountering exceptions.
void	Enable (uint32_t wid, uint64_t next_pc) Initialize each warp’s instruction buffer when doing PipelinedSM::Process .
void	Enq (InstrPtr instr) Enqueue an instruction into the buffer.
void	ForEachValidInstrStream (TFunc cb) Iterate over each valid instruction stream.
	InstrBuffer (PipelinedSMImpl * sm, const ArchParam & p=kDefaultArchParam, const PipelinedSM::Param & pp=PipelinedSM::kDefaultParam) Construct the instruction buffer.
void	NotifyCtrlFlowChange (uint32_t wid, uint64_t wpc, std::optional< uint64_t > sswpc) Notify the buffer of a control flow change (divergence or convergence).
void	Reset () Reset the entire instruction buffer (all warps).
virtual bool	capacious (uint32_t wid, std::optional< uint32_t > ssw) const Check if the instruction stream can accommodate more instructions.
std::size_t	capacity (uint32_t wid) const Get the instruction buffer capacity for a warp.
bool	empty (uint32_t wid, std::optional< uint32_t > ssw) const Check if the instruction stream is empty.
virtual uint64_t	fetch_pc (uint32_t wid, std::optional< uint32_t > ssw) const Get the current fetch PC.
const InstrPtr &	front (uint32_t wid, std::optional< uint32_t > ssw) const Get the instruction at the front of a warp’s instruction stream.
bool	full (uint32_t wid, std::optional< uint32_t > ssw) const Check if the instruction stream is full.
bool	is_diverged (uint32_t wid) const Check whether the warp has diverged.
uint64_t	next_pc (uint32_t wid, std::optional< uint32_t > ssw) const Get the next PC for the warp’s instruction stream.
void	set_fetch_pc (uint32_t wid, std::optional< uint32_t > ssw, uint64_t fetch_pc) const Set the fetch PC for a given warp.
std::size_t	size (uint32_t wid, std::optional< uint32_t > ssw) const Get the number of instructions currently buffered.
bool	valid (uint32_t wid, std::optional< uint32_t > ssw) const Check whether the instruction stream is valid.
virtual	~InstrBuffer () = default

Protected Attributes

Type	Name
std::vector< bool >	capacious_warps_
std::vector< uint64_t >	fetch_pc_

Protected Attributes inherited from simtix::pipelined::InstrBuffer

See simtix::pipelined::InstrBuffer

Type	Name
std::vector< std::unique_ptr< InstrStream > >	buf_
std::size_t	capacity_
const uint32_t	kFetchWidth
PipelinedSMImpl *	sm_

Protected Static Attributes inherited from simtix::pipelined::InstrBuffer

See simtix::pipelined::InstrBuffer

Type	Name
constexpr std::array< std::optional< uint32_t >, 3 >	kInstrStreamVariants = `{std::nullopt, 0, 1}`

Protected Functions inherited from simtix::pipelined::InstrBuffer

See simtix::pipelined::InstrBuffer

Type	Name
bool	CanEnqInstrToStream (uint32_t wid, std::optional< uint32_t > ssw, uint64_t wpc) const Check if an instruction can be enqueued to the stream.
void	EnqInstrToStream (uint32_t wid, std::optional< uint32_t > ssw, InstrPtr instr) Enqueue an instruction into the instruction stream.
void	FlushFIFO (sim::SizedQueue< InstrPtr > * fifo) Flush all instructions in FIFO.
void	RedirectInstrStream (uint32_t wid, uint64_t fetch_pc, std::optional< uint32_t > ssw) Reset next_pc and fetch_pc.
void	UpdateFetchPC (InstrStream * is, std::optional< uint32_t > ssw) Update the fetch PC of a given instruction stream.

Public Functions Documentation

function MockInstrBuffer

inline explicit simtix::uvm::MockInstrBuffer::MockInstrBuffer (
    PipelinedSMImpl * sm,
    const ArchParam & p=kDefaultArchParam,
    const PipelinedSM::Param & pp=PipelinedSM::kDefaultParam
)

function PutTestInput

inline void simtix::uvm::MockInstrBuffer::PutTestInput (
    std::vector< bool > capacious_warps,
    std::vector< uint64_t > fetch_pc
)

function ResetTestInput

inline void simtix::uvm::MockInstrBuffer::ResetTestInput ()

function capacious

Check if the instruction stream can accommodate more instructions.

inline virtual bool simtix::uvm::MockInstrBuffer::capacious (
    uint32_t wid,
    std::optional< uint32_t > ssw
) override const

Parameters:

wid Warp ID.
ssw Spatial sub-warp ID.

Returns:

True if enough space is available.

Implements simtix::pipelined::InstrBuffer::capacious

function empty

inline bool simtix::uvm::MockInstrBuffer::empty (
    uint32_t wid,
    std::optional< uint32_t > ssw
) const

function fetch_pc

Get the current fetch PC.

inline virtual uint64_t simtix::uvm::MockInstrBuffer::fetch_pc (
    uint32_t wid,
    std::optional< uint32_t > ssw
) override const

Parameters:

wid Warp ID.
ssw Spatial sub-warp ID.

Returns:

Fetch PC value.

Implements simtix::pipelined::InstrBuffer::fetch_pc

function ~MockInstrBuffer

simtix::uvm::MockInstrBuffer::~MockInstrBuffer () = default

Protected Attributes Documentation

variable capacious_warps_

std::vector<bool> simtix::uvm::MockInstrBuffer::capacious_warps_;

variable fetch_pc_

std::vector<uint64_t> simtix::uvm::MockInstrBuffer::fetch_pc_;

The documentation for this class was generated from the following file projects/simtix/src/simtix/uvm/mock_instr_buffer.h