Class Members

a

• addr (MemConfig, simtix::mem::Cache::Param::NonCacheableEntry, simtix::mem::CacheImpl::DataArrayRequest, simtix::mem::CacheImpl::MemResponse, simtix::mem::MemoryInterface::Payload, simtix::mem::XBar::Impl::slave_t, simtix::pipelined::PCGenStage::FetchFilterEntry, simtix::system::SingleCoreSystem::Config::Mem)
• ArchParam (simtix::ArchParam)
• ArchParamBuilder (simtix::ArchParamBuilder)
• AtomicArbitrator (simtix::AtomicArbitrator)
• AtomicLoadStoreUnit (simtix::AtomicLoadStoreUnit)
• accepted (simtix::AtomicLoadStoreUnit::Request, simtix::CoalescingLoadStoreUnit::MemRequest)
• AtomicSM (simtix::AtomicSM)
• AttachDMem (simtix::AtomicSM, simtix::BaseLoadStoreUnit, simtix::BaseSM, simtix::BaseSMImpl, simtix::pipelined::PipelinedSM, simtix::pipelined::PipelinedSMImpl)
• AttachIMem (simtix::AtomicSM, simtix::BaseSM, simtix::BaseSMImpl, simtix::pipelined::PipelinedSM, simtix::pipelined::PipelinedSMImpl, simtix::uvm::FrontendGolden)
• AtomicSMImpl (simtix::AtomicSMImpl)
• arbitrator (simtix::AtomicSMImpl, simtix::BaseSMImpl, simtix::Warp, simtix::pipelined::PipelinedSMImpl)
• atomic_arbitrator_ (simtix::AtomicSMImpl)
• atomic_lsu_ (simtix::AtomicSMImpl)
• arrived_wids (simtix::BaseSMImpl::Barrier)
• AcceptCoreRequests (simtix::CoalescingLoadStoreUnit)
• Assign (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOp32, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrOpImm32, simtix::InstrStore, simtix::InstrSystem)
• active_threads_ (simtix::Instr, simtix::Warp)
• auipc_ (simtix::InstrAuipc)
• access_fault_ (simtix::InstrLoad, simtix::InstrStore)
• add_ (simtix::InstrOp)
• and_ (simtix::InstrOp)
• addw_ (simtix::InstrOp32)
• addi_ (simtix::InstrOpImm)
• andi_ (simtix::InstrOpImm)
• addiw_ (simtix::InstrOpImm32)
• Allocate (simtix::InstrPool, simtix::InstrPoolInterface, simtix::pipelined::FetchBuf)
• AddKonataLabel (simtix::InstrPtr)
• AccessRegfile (simtix::PipelinedArbitrator)
• ArbitrateReq (simtix::PipelinedArbitrator)
• active_threads (simtix::PipelinedArbitrator::Request, simtix::Warp)
• additional_check_ (simtix::RRWarpSched)
• AdvancePC (simtix::Thread)
• ActiveThreadMaskPattern (simtix::Warp)
• ArbitratePC (simtix::Warp)
• active_thread_mask (simtix::Warp)
• active_thread_mask_ (simtix::Warp)
• active_tswid_ (simtix::Warp)
• AttachNextLevel (simtix::mem::Cache, simtix::mem::CacheInterface, simtix::mem::NBHBCache)
• AcceptCoreRequest (simtix::mem::CacheImpl, simtix::mem::MshrFile)
• AcceptMemResponse (simtix::mem::CacheImpl)
• AccessDataArray (simtix::mem::CacheImpl)
• AccessTagArray (simtix::mem::CacheImpl)
• arr_ (simtix::mem::DataArray, simtix::mem::TagArray)
• AcceptRequest (simtix::mem::SimpleMemory::Impl, simtix::mem::XBar::Impl)
• AddSlave (simtix::mem::XBar, simtix::mem::XBar::Impl)
• AcceptPendingCommitRequests (simtix::pipelined::CommitStage)
• alu_array_ (simtix::pipelined::ExecuteStage)
• access_fault (simtix::pipelined::FetchBuf::Entry, simtix::uvm::FrontendGolden::Output)
• AcceptPendingCollectReqeusts (simtix::pipelined::OperandCollectStage)
• AttachDCache (simtix::pipelined::PipelinedSM)
• AttachICache (simtix::pipelined::PipelinedSM)
• avg_instr_shared (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• AddStat (simtix::stat::Group)
• AddStatGroup (simtix::stat::Group)
• average (simtix::stat::Vector)
• average_ (simtix::stat::Vector)
• Average (simtix::stat::Vector::Average)
• arch_param_builder (simtix::system::SingleCoreSystem::Config)
• AttachSM (simtix::system::TaskDispatcher)
• addr_misaligned (simtix::uvm::FrontendGolden::Output)

b

• Build (simtix::ArchParam, simtix::pipelined::PipelinedSM::Param)
• Busy (simtix::AtomicLoadStoreUnit, simtix::BaseFunctionUnit, simtix::CoalescingLoadStoreUnit, simtix::FixedLatencyUnit)
• BaseLoadStoreUnit (simtix::BaseLoadStoreUnit)
• BaseSM (simtix::BaseSM)
• BarrierCompleted (simtix::BaseSMImpl)
• BaseSMImpl (simtix::BaseSMImpl)
• barriers_ (simtix::BaseSMImpl)
• BitMask (simtix::Instr)
• barrier_valid (simtix::Instr, simtix::InstrFormosa)
• beq_ (simtix::InstrBranch)
• bge_ (simtix::InstrBranch)
• bgeu_ (simtix::InstrBranch)
• blt_ (simtix::InstrBranch)
• bltu_ (simtix::InstrBranch)
• bne_ (simtix::InstrBranch)
• bar_wc_ (simtix::InstrFormosa)
• barrier_valid_ (simtix::InstrFormosa)
• bid_ (simtix::InstrFormosa, simtix::Warp)
• buf_ (simtix::InstrLoad, simtix::InstrStore, simtix::pipelined::FetchBuf, simtix::pipelined::InstrBuffer)
• bank_mask_ (simtix::PipelinedArbitrator)
• bank_mask_arr_ (simtix::PipelinedArbitrator)
• bank_available (simtix::PipelinedArbitrator::Stat, simtix::mem::BankedMemory::Impl::Stat, simtix::mem::NBHBCacheImpl::Stat)
• bank_conflict (simtix::PipelinedArbitrator::Stat, simtix::mem::BankedMemory::Impl::Stat, simtix::mem::NBHBCacheImpl::Stat)
• bank_utilization (simtix::PipelinedArbitrator::Stat, simtix::mem::BankedMemory::Impl::Stat, simtix::mem::NBHBCacheImpl::Stat)
• bid (simtix::Warp)
• BankedMemory (simtix::mem::BankedMemory)
• bank_occupied_ (simtix::mem::BankedMemory::Impl, simtix::mem::NBHBCacheImpl)
• banks_ (simtix::mem::BankedMemory::Impl, simtix::mem::NBHBCacheImpl)
• bytes (simtix::pipelined::FetchBuf::Entry)
• busy_ (simtix::sim::Clocked)
• BaseSystem (simtix::system::BaseSystem)
• banked_param (simtix::system::SingleCoreSystem::Config::Mem)

c

• cores_per_system (simtix::ArchParamBuilder)
• cid (simtix::AtomicSM, simtix::BaseSM, simtix::pipelined::PipelinedSM)
• cid_ (simtix::BaseSMImpl)
• cycle (simtix::BaseSMImpl::Stat, simtix::BaseSMImpl::WorkGroupStat)
• committed_arithmetic_instr (simtix::BaseSMImpl::WorkGroupStat)
• committed_branch_instr (simtix::BaseSMImpl::WorkGroupStat)
• committed_custom_instr (simtix::BaseSMImpl::WorkGroupStat)
• committed_fp_instr (simtix::BaseSMImpl::WorkGroupStat)
• committed_jump_instr (simtix::BaseSMImpl::WorkGroupStat)
• committed_load_instr (simtix::BaseSMImpl::WorkGroupStat)
• committed_store_instr (simtix::BaseSMImpl::WorkGroupStat)
• committed_system_instr (simtix::BaseSMImpl::WorkGroupStat)
• custom_instr_ratio (simtix::BaseSMImpl::WorkGroupStat)
• Coalesce (simtix::CoalescingLoadStoreUnit)
• CoalescingLoadStoreUnit (simtix::CoalescingLoadStoreUnit)
• core_req_buf_ (simtix::CoalescingLoadStoreUnit)
• CanCommit (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem, simtix::InstrTrap)
• CanExecute (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem, simtix::InstrTrap)
• CanIssue (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem, simtix::InstrTrap)
• CanRetire (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem, simtix::InstrTrap)
• Commit (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem, simtix::InstrTrap, simtix::pipelined::CommitStage)
• committed_ (simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem)
• czero_eqz_ (simtix::InstrOp)
• czero_nez_ (simtix::InstrOp)
• cmp_name (simtix::InstrOpFp)
• cmp_op (simtix::InstrOpFp)
• cvt1_name (simtix::InstrOpFp)
• cvt1_op (simtix::InstrOpFp)
• cvt2_name (simtix::InstrOpFp)
• cvt2_op (simtix::InstrOpFp)
• csr_ (simtix::InstrSystem)
• csrrc_ (simtix::InstrSystem)
• csrrci_ (simtix::InstrSystem)
• csrrs_ (simtix::InstrSystem)
• csrrsi_ (simtix::InstrSystem)
• csrrw_ (simtix::InstrSystem)
• csrrwi_ (simtix::InstrSystem)
• CompactActiveThreads (simtix::Warp)
• ComputeRTV (simtix::Warp)
• Cache (simtix::mem::Cache)
• CacheImpl (simtix::mem::CacheImpl)
• CanServeMshrReqFirst (simtix::mem::CacheImpl)
• core_req_queue_ (simtix::mem::CacheImpl)
• core_resp_queue_ (simtix::mem::CacheImpl)
• CoreRequest (simtix::mem::CacheImpl::CoreRequest)
• core_req (simtix::mem::CacheImpl::DataArrayRequest, simtix::mem::CacheImpl::MemResponse)
• CacheInterface (simtix::mem::CacheInterface)
• CanAcceptCoreRequest (simtix::mem::MshrFile)
• CanAcceptCoreRequestEarly (simtix::mem::MshrFile)
• CheckIfMshrHit (simtix::mem::MshrFile)
• core_req_queue (simtix::mem::MshrFile::MSHR)
• curr_bandwidth_ (simtix::mem::XBar::Impl)
• CommitStage (simtix::pipelined::CommitStage)
• commit_buf_ (simtix::pipelined::CommitStage)
• CollectFinishedInstr (simtix::pipelined::ExecuteStage)
• CanEnq (simtix::pipelined::InstrBuffer)
• CanEnqInstrToStream (simtix::pipelined::InstrBuffer)
• capacious (simtix::pipelined::InstrBuffer, simtix::uvm::MockInstrBuffer)
• capacity (simtix::pipelined::InstrBuffer, simtix::sim::SizedQueue)
• capacity_ (simtix::pipelined::InstrBuffer, simtix::sim::SizedQueue)
• collect_buf_ (simtix::pipelined::OperandCollectStage)
• coalescing_granularity (simtix::pipelined::PipelinedSM::ParamBuilder)
• commit_buffer_size (simtix::pipelined::PipelinedSM::ParamBuilder)
• commit_width (simtix::pipelined::PipelinedSM::ParamBuilder)
• ClearInstrQueue (simtix::pipelined::PipelinedSMImpl)
• coalescing_lsu_ (simtix::pipelined::PipelinedSMImpl)
• commit_iq_ (simtix::pipelined::PipelinedSMImpl)
• commit_stage_ (simtix::pipelined::PipelinedSMImpl)
• can_share_instr (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• Clocked (simtix::sim::Clocked)
• clocked_objs_map_ (simtix::sim::Clocked)
• cur_tick_ (simtix::sim::Clocked)
• CanDeq (simtix::sim::GenericDelayQueue)
• child_groups_ (simtix::stat::Group)
• child_stats_ (simtix::stat::Group)
• constant_ (simtix::stat::ScalarBase)
• cfg_ (simtix::system::SingleCoreSystem, tb::Testbed)
• capacious_warps (simtix::uvm::FrontendGolden::Input)
• capacious_warps_ (simtix::uvm::MockInstrBuffer)

d

• DECL_PARAM_W_GETTER (simtix::ArchParam, simtix::pipelined::PipelinedSM::Param)
• dmem_port_ (simtix::BaseLoadStoreUnit, simtix::BaseSMImpl)
• delay_queue_ (simtix::FixedLatencyUnit, simtix::mem::SimpleMemory::Impl)
• Decode (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOp32, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrOpImm32, simtix::InstrStore, simtix::InstrSystem, simtix::InstrTrap, simtix::pipelined::DecodeStage)
• DecodeFunct3 (simtix::Instr)
• DecodeFunct7 (simtix::Instr)
• DecodeOpcode (simtix::Instr)
• DecodeRd (simtix::Instr)
• DecodeRs1 (simtix::Instr)
• DecodeRs2 (simtix::Instr)
• DecodeImmItype (simtix::InstrAuipc, simtix::InstrJalr, simtix::InstrLui, simtix::InstrOpImm)
• DecodePC (simtix::InstrAuipc)
• DecodeImmBtype (simtix::InstrBranch)
• DecodeImmJtype (simtix::InstrJal)
• div_ (simtix::InstrOp)
• divu_ (simtix::InstrOp)
• divuw_ (simtix::InstrOp32)
• divw_ (simtix::InstrOp32)
• DuplicateForWarp (simtix::InstrPtr)
• Deq (simtix::InstrQueue, simtix::pipelined::InstrBuffer, simtix::sim::GenericDelayQueue, simtix::sim::SizedQueue)
• DecodeImmStype (simtix::InstrStore)
• DecodeCSR (simtix::InstrSystem)
• DecodeUimm (simtix::InstrSystem)
• data (simtix::PipelinedArbitrator::Request, simtix::mem::MemoryInterface::Payload, simtix::stat::Vector)
• data_arr (simtix::PipelinedArbitrator::Request)
• dual_path_stall (simtix::WarpSched::Stat)
• data_array_ (simtix::mem::CacheImpl)
• data_array_req_queue_ (simtix::mem::CacheImpl)
• DataArrayRequest (simtix::mem::CacheImpl::DataArrayRequest)
• data_buf (simtix::mem::CacheImpl::WriteBufferEntry, simtix::mem::MshrFile::MSHR)
• DataArray (simtix::mem::DataArray)
• dirty (simtix::mem::TagArray::Tag)
• dim (simtix::opencl::Kernel, simtix::opencl::WorkGroup)
• DecodeStage (simtix::pipelined::DecodeStage)
• DispatchPendingInstr (simtix::pipelined::ExecuteStage)
• Disable (simtix::pipelined::InstrBuffer)
• dcache_param (simtix::pipelined::PipelinedSM::ParamBuilder)
• decode_width (simtix::pipelined::PipelinedSM::ParamBuilder)
• dcache_ (simtix::pipelined::PipelinedSMImpl, simtix::system::SingleCoreSystem)
• decode_iq_ (simtix::pipelined::PipelinedSMImpl)
• decode_stage_ (simtix::pipelined::PipelinedSMImpl)
• DelayQueue (simtix::sim::DelayQueue)
• delay (simtix::sim::DelayQueue)
• delays_ (simtix::sim::GenericDelayQueue)
• deque_ (simtix::sim::SizedQueue)
• desc (simtix::stat::StatBase)
• desc_ (simtix::stat::StatBase)
• Dump (simtix::trace::KonataTracer)
• DumpTrace (simtix::trace::OstreamTracer)
• DumpTraceFlag (simtix::trace::OstreamTracer)
• DumpMem (tb::Testbed)

e

• elf (SimConfig)
• elf_path (SimConfig)
• ewid (simtix::BaseSM::FaultStatus)
• Execute (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOp32, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrOpImm32, simtix::InstrStore, simtix::InstrSystem, simtix::InstrTrap, simtix::pipelined::ExecuteStage)
• ExecutionUnit (simtix::Instr)
• exception_valid (simtix::Instr, simtix::InstrLoad, simtix::InstrStore, simtix::InstrSystem, simtix::InstrTrap)
• execution_unit (simtix::Instr)
• execution_unit_ (simtix::Instr)
• executed_ (simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore)
• ecall_ (simtix::InstrSystem)
• entry_pc (simtix::opencl::Kernel, simtix::opencl::WorkGroup)
• ExecuteStage (simtix::pipelined::ExecuteStage)
• empty (simtix::pipelined::FetchBuf, simtix::pipelined::InstrBuffer, simtix::uvm::MockInstrBuffer)
• Entry (simtix::pipelined::FetchBuf::Entry)
• Enable (simtix::pipelined::InstrBuffer)
• Enq (simtix::pipelined::InstrBuffer, simtix::sim::DelayQueue, simtix::sim::GenericDelayQueue, simtix::sim::SizedQueue)
• EnqInstrToStream (simtix::pipelined::InstrBuffer)
• ExecuteOperandCollectedRequests (simtix::pipelined::OperandCollectStage)
• execute_width (simtix::pipelined::PipelinedSM::ParamBuilder)
• execute_iq_ (simtix::pipelined::PipelinedSMImpl)
• execute_stage_ (simtix::pipelined::PipelinedSMImpl)
• expr_ (simtix::stat::Formula, simtix::stat::PostfixExpr)
• Evaluate (simtix::stat::PostfixExpr)
• ecid (simtix::system::TaskDispatcher::CompletionInfo)
• end_time_ (tb::Testbed)

f

• format (fmt::formatter< simtix::ArchParam::WarpSchedPolicies >, fmt::formatter< simtix::BaseSM::Status >, fmt::formatter< simtix::SMType >, fmt::formatter< simtix::mem::Cache::Param::ReplacementPolicies >, fmt::formatter< simtix::mem::Cache::Param::WriteHitPolicies >, fmt::formatter< simtix::mem::Cache::Param::WriteMissPolicies >, fmt::formatter< simtix::mem::MemType >, fmt::formatter< simtix::stat::Operation >, fmt::formatter< simtix::system::TaskDispatcher::CompletionInfo::Status >, fmt::formatter< simtix::system::TaskDispatcher::Status >)
• fault_status (simtix::AtomicSM, simtix::BaseSM, simtix::pipelined::PipelinedSM, simtix::system::TaskDispatcher::CompletionInfo)
• fault_status_ (simtix::BaseSMImpl)
• FixedLatencyUnit (simtix::FixedLatencyUnit)
• funct3_ (simtix::Instr)
• funct7_ (simtix::Instr)
• fsa_bar_ (simtix::InstrFormosa)
• fsa_pri_lower_ (simtix::InstrFormosa)
• fsa_pri_lower_f_ (simtix::InstrFormosa)
• fsa_pri_raise_ (simtix::InstrFormosa)
• fsa_pri_raise_f_ (simtix::InstrFormosa)
• fsa_pri_reset_ (simtix::InstrFormosa)
• fsa_pri_set_ (simtix::InstrFormosa)
• fault_addr_ (simtix::InstrLoad, simtix::InstrStore)
• fadd_d_ (simtix::InstrOpFp)
• fadd_s_ (simtix::InstrOpFp)
• fclass_d_ (simtix::InstrOpFp)
• fclass_s_ (simtix::InstrOpFp)
• fcmp_eq_d_ (simtix::InstrOpFp)
• fcmp_eq_s_ (simtix::InstrOpFp)
• fcmp_le_d_ (simtix::InstrOpFp)
• fcmp_le_s_ (simtix::InstrOpFp)
• fcmp_lt_d_ (simtix::InstrOpFp)
• fcmp_lt_s_ (simtix::InstrOpFp)
• fcvt_d_l_ (simtix::InstrOpFp)
• fcvt_d_lu_ (simtix::InstrOpFp)
• fcvt_d_s_ (simtix::InstrOpFp)
• fcvt_d_w_ (simtix::InstrOpFp)
• fcvt_d_wu_ (simtix::InstrOpFp)
• fcvt_l_d_ (simtix::InstrOpFp)
• fcvt_l_s_ (simtix::InstrOpFp)
• fcvt_lu_d_ (simtix::InstrOpFp)
• fcvt_lu_s_ (simtix::InstrOpFp)
• fcvt_s_d_ (simtix::InstrOpFp)
• fcvt_s_l_ (simtix::InstrOpFp)
• fcvt_s_lu_ (simtix::InstrOpFp)
• fcvt_s_w_ (simtix::InstrOpFp)
• fcvt_s_wu_ (simtix::InstrOpFp)
• fcvt_w_d_ (simtix::InstrOpFp)
• fcvt_w_s_ (simtix::InstrOpFp)
• fcvt_wu_d_ (simtix::InstrOpFp)
• fcvt_wu_s_ (simtix::InstrOpFp)
• fdiv_d_ (simtix::InstrOpFp)
• fdiv_s_ (simtix::InstrOpFp)
• fmax_d_ (simtix::InstrOpFp)
• fmax_s_ (simtix::InstrOpFp)
• fmin_d_ (simtix::InstrOpFp)
• fmin_s_ (simtix::InstrOpFp)
• fmt_ (simtix::InstrOpFp, simtix::InstrOpFused)
• fmul_d_ (simtix::InstrOpFp)
• fmul_s_ (simtix::InstrOpFp)
• fmv_d_x_ (simtix::InstrOpFp)
• fmv_w_x_ (simtix::InstrOpFp)
• fmv_x_d_ (simtix::InstrOpFp)
• fmv_x_w_ (simtix::InstrOpFp)
• fp_exception_ (simtix::InstrOpFp, simtix::InstrOpFused)
• fp_fmt_ (simtix::InstrOpFp, simtix::InstrOpFused)
• fsgnj_d_ (simtix::InstrOpFp)
• fsgnj_n_d_ (simtix::InstrOpFp)
• fsgnj_n_s_ (simtix::InstrOpFp)
• fsgnj_s_ (simtix::InstrOpFp)
• fsgnj_x_d_ (simtix::InstrOpFp)
• fsgnj_x_s_ (simtix::InstrOpFp)
• fsqrt_d_ (simtix::InstrOpFp)
• fsqrt_s_ (simtix::InstrOpFp)
• fsub_d_ (simtix::InstrOpFp)
• fsub_s_ (simtix::InstrOpFp)
• funct5_ (simtix::InstrOpFp)
• fmadd_d_ (simtix::InstrOpFused)
• fmadd_s_ (simtix::InstrOpFused)
• fmsub_d_ (simtix::InstrOpFused)
• fmsub_s_ (simtix::InstrOpFused)
• fnmadd_d_ (simtix::InstrOpFused)
• fnmadd_s_ (simtix::InstrOpFused)
• fnmsub_d_ (simtix::InstrOpFused)
• fnmsub_s_ (simtix::InstrOpFused)
• first_stage_name_ (simtix::InstrPtr)
• flushed_ (simtix::InstrPtr)
• Flush (simtix::InstrQueue, simtix::mem::Cache, simtix::mem::CacheInterface, simtix::mem::NBHBCache, simtix::trace::KonataRetireReporter)
• following_stage_ (simtix::InstrQueue)
• forwarded_requests (simtix::PipelinedArbitrator::Stat, simtix::mem::BankedMemory::Impl::Stat, simtix::mem::NBHBCacheImpl::Stat)
• ForwardRequest (simtix::mem::BankedMemory::Impl, simtix::mem::NBHBCacheImpl)
• flush_on_resp_ (simtix::mem::CacheImpl)
• flush_tag_arr_index_ (simtix::mem::CacheImpl)
• free_write_buffers_ (simtix::mem::CacheImpl)
• fill (simtix::mem::CacheImpl::DataArrayRequest)
• flush_addr_opt (simtix::mem::CacheImpl::DataArrayRequest)
• free_mshrs_ (simtix::mem::MshrFile)
• FindDirtyTag (simtix::mem::TagArray)
• free_commit_buf_ids_ (simtix::pipelined::CommitStage)
• fu_array_ (simtix::pipelined::ExecuteStage)
• FetchBuf (simtix::pipelined::FetchBuf)
• free_ids_ (simtix::pipelined::FetchBuf)
• full (simtix::pipelined::FetchBuf, simtix::pipelined::InstrBuffer, simtix::sim::SizedQueue)
• Fetch (simtix::pipelined::FetchStage)
• FetchStage (simtix::pipelined::FetchStage)
• FlushFIFO (simtix::pipelined::InstrBuffer)
• ForEachValidInstrStream (simtix::pipelined::InstrBuffer)
• fetch_pc (simtix::pipelined::InstrBuffer, simtix::pipelined::InstrBuffer::InstrStream, simtix::uvm::FrontendGolden::Input, simtix::uvm::MockInstrBuffer)
• front (simtix::pipelined::InstrBuffer)
• fifos (simtix::pipelined::InstrBuffer::InstrStream)
• fetch_filter_ (simtix::pipelined::PCGenStage)
• free_entry_ids_ (simtix::pipelined::PCGenStage)
• fetch_width (simtix::pipelined::PipelinedSM::ParamBuilder)
• fetch_buf_ (simtix::pipelined::PipelinedSMImpl)
• fetch_stage_ (simtix::pipelined::PipelinedSMImpl)
• fetch_due_to_issuing (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• fetch_due_to_starving (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• fetch_filtered (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• FcfsDelayQueue (simtix::sim::FcfsDelayQueue)
• Formula (simtix::stat::Formula)
• flush_ (simtix::trace::KonataRetireReporter)
• flushed (simtix::trace::KonataRetireReporter::InstrRetire)
• FrontendGolden (simtix::uvm::FrontendGolden)
• FrontendGoldenImpl (simtix::uvm::FrontendGoldenImpl)
• fetch_pc_ (simtix::uvm::MockInstrBuffer)

g

• Get (simtix::AtomicLoadStoreUnit, simtix::BaseFunctionUnit, simtix::CoalescingLoadStoreUnit, simtix::FixedLatencyUnit, simtix::uvm::FrontendGolden)
• GetLineBuffer (simtix::CoalescingLoadStoreUnit)
• GetStrbBuffer (simtix::CoalescingLoadStoreUnit)
• Gto (simtix::Gto)
• GetInstance (simtix::InstrPool, simtix::trace::KonataRetireReporter, simtix::trace::KonataTracer, simtix::trace::OstreamTracer)
• GetWay (simtix::mem::DataArray)
• GetMshrCoreReqQueueFront (simtix::mem::MshrFile)
• GetMshrDataBuffer (simtix::mem::MshrFile)
• GetMshrPayload (simtix::mem::MshrFile)
• GetPendingReplayRequest (simtix::mem::MshrFile)
• GetSet (simtix::mem::TagArray)
• global_offset (simtix::opencl::Kernel, simtix::opencl::WorkGroup)
• global_size (simtix::opencl::Kernel, simtix::opencl::WorkGroup)
• GetPendingFetchReq (simtix::pipelined::FetchBuf)
• GetPendingFetchResp (simtix::pipelined::FetchBuf)
• GenerateFetchRequest (simtix::pipelined::PCGenStage)
• generic_delay_queue_ (simtix::sim::DelayQueue, simtix::sim::FcfsDelayQueue)
• GenericDelayQueue (simtix::sim::GenericDelayQueue)
• Group (simtix::stat::Group)
• GetCompletionInfo (simtix::system::TaskDispatcher)
• GetInstanceImpl (simtix::trace::KonataTracer, simtix::trace::OstreamTracer)

h

• has_kernel_info (SimConfig)
• has_mmap (SimConfig)
• HasPendingTasks (simtix::AtomicLoadStoreUnit, simtix::AtomicSM, simtix::CoalescingLoadStoreUnit, simtix::mem::BankedMemory, simtix::mem::Cache, simtix::mem::NBHBCache, simtix::mem::SimpleMemory, simtix::mem::XBar, simtix::pipelined::PipelinedSM, simtix::sim::Clocked, simtix::sim::GenericDelayQueue, simtix::system::TaskDispatcher, simtix::trace::KonataRetireReporter, simtix::uvm::FrontendGolden)
• HandleReadRequests (simtix::CoalescingLoadStoreUnit)
• HandleWriteRequests (simtix::CoalescingLoadStoreUnit)
• has_fatal_exception (simtix::InstrOpFp, simtix::InstrOpFused)
• hpmcounter3_ (simtix::Thread)
• HasPendingCommit (simtix::Warp)
• HasUnissuedTSW (simtix::Warp)
• HasUnresolvedBranch (simtix::Warp)
• HandleCoreResponse (simtix::mem::CacheImpl)
• HandleMemRequest (simtix::mem::CacheImpl)
• has_pending_flush_ (simtix::mem::CacheImpl)
• HasFreeMshr (simtix::mem::MshrFile)
• HasFreeMshrEarly (simtix::mem::MshrFile)
• HasPendingMshr (simtix::mem::MshrFile)
• HasPendingReplayRequest (simtix::mem::MshrFile)
• HandleDelay (simtix::mem::SimpleMemory::Impl)
• HandleReadWrite (simtix::mem::SimpleMemory::Impl)
• HandleRequest (simtix::mem::SimpleMemory::Impl)
• HandleResponse (simtix::mem::SimpleMemory::Impl)

i

• is_write (simtix::AtomicLoadStoreUnit::Request, simtix::PipelinedArbitrator::Request, simtix::mem::CacheImpl::CoreRequest, simtix::mem::SimpleMemory::Impl::Request)
• impl_ (simtix::AtomicSM, simtix::mem::BankedMemory, simtix::mem::Cache, simtix::mem::NBHBCache, simtix::mem::SimpleMemory, simtix::mem::XBar, simtix::pipelined::PipelinedSM, simtix::system::TaskDispatcher, simtix::uvm::FrontendGolden)
• Impl (simtix::AtomicSM::Impl, simtix::mem::BankedMemory::Impl, simtix::mem::Cache::Impl, simtix::mem::NBHBCache::Impl, simtix::mem::SimpleMemory::Impl, simtix::mem::XBar::Impl, simtix::pipelined::PipelinedSM::Impl, simtix::uvm::FrontendGolden::Impl)
• ifetch_accepted_ (simtix::AtomicSMImpl)
• ifetch_access_fault_ (simtix::AtomicSMImpl)
• ifetch_bytes_ (simtix::AtomicSMImpl)
• ifetch_payload_ (simtix::AtomicSMImpl)
• ifetch_ready_ (simtix::AtomicSMImpl)
• instr_ (simtix::AtomicSMImpl, simtix::InstrPtr)
• IsBusy (simtix::BaseSMImpl)
• imem_port_ (simtix::BaseSMImpl)
• instret (simtix::BaseSMImpl::WorkGroupStat)
• ipc (simtix::BaseSMImpl::WorkGroupStat)
• is_write_ (simtix::CoalescingLoadStoreUnit)
• Instr (simtix::Instr)
• Issue (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrSystem, simtix::InstrTrap)
• illegal (simtix::Instr)
• illegal_ (simtix::Instr)
• iword (simtix::Instr, simtix::uvm::FrontendGolden::Output)
• iword_ (simtix::Instr)
• InstrAuipc (simtix::InstrAuipc)
• imm_ (simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpImm, simtix::InstrStore)
• InstrBranch (simtix::InstrBranch)
• InstrFormosa (simtix::InstrFormosa)
• InstrJal (simtix::InstrJal)
• InstrJalr (simtix::InstrJalr)
• InstrLoad (simtix::InstrLoad)
• InstrLui (simtix::InstrLui)
• InstrOp (simtix::InstrOp)
• InstrOp32 (simtix::InstrOp32)
• InstrOpFp (simtix::InstrOpFp)
• InstrOpFused (simtix::InstrOpFused)
• InstrOpImm (simtix::InstrOpImm)
• InstrOpImm32 (simtix::InstrOpImm32)
• InstrPool (simtix::InstrPool)
• Instantiate (simtix::InstrPtr)
• InstrPtr (simtix::InstrPtr)
• instr (simtix::InstrPtr)
• instr_count_ (simtix::InstrPtr)
• InstrQueue (simtix::InstrQueue)
• InstrStore (simtix::InstrStore)
• InstrSystem (simtix::InstrSystem)
• InstrTrap (simtix::InstrTrap)
• Initialize (simtix::Warp, simtix::system::BaseSystem, simtix::system::SingleCoreSystem, tb::Testbed)
• is_diverged (simtix::Warp, simtix::pipelined::InstrBuffer, simtix::pipelined::InstrBuffer::InstrStream)
• is_diverged_ (simtix::Warp)
• is_last_tsw (simtix::Warp)
• issue_tswid (simtix::Warp)
• issue_tswid_ (simtix::Warp)
• issue_ssw_opp (simtix::WarpSched::Stat)
• IsNonCacheablePayload (simtix::mem::CacheImpl)
• is_flush (simtix::mem::CacheImpl::CoreRequest)
• is_non_cacheable (simtix::mem::CacheImpl::MemResponse)
• IsOutOfBound (simtix::mem::DataArray)
• id (simtix::mem::MemoryInterface::Payload, simtix::opencl::WorkGroup)
• idiv_array_ (simtix::pipelined::ExecuteStage)
• imul_array_ (simtix::pipelined::ExecuteStage)
• instrs (simtix::pipelined::FetchBuf::Entry)
• IssuePendingFetchRequests (simtix::pipelined::FetchStage)
• InstrBuffer (simtix::pipelined::InstrBuffer)
• InstrStream (simtix::pipelined::InstrBuffer::InstrStream)
• issuing_leader_warps_ (simtix::pipelined::PCGenStage)
• ialu_latency (simtix::pipelined::PipelinedSM::ParamBuilder)
• icache_param (simtix::pipelined::PipelinedSM::ParamBuilder)
• idiv_latency (simtix::pipelined::PipelinedSM::ParamBuilder)
• imul_latency (simtix::pipelined::PipelinedSM::ParamBuilder)
• instr_buffer_capacity (simtix::pipelined::PipelinedSM::ParamBuilder)
• instr_queue_capacity (simtix::pipelined::PipelinedSM::ParamBuilder)
• ibuffer_ (simtix::pipelined::PipelinedSMImpl)
• icache_ (simtix::pipelined::PipelinedSMImpl, simtix::system::SingleCoreSystem)
• ibuffer_stall (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• instr_filled (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• instr_flushed (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• instr_flushed_ratio (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• instr_shared (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• instr_sharing_opp (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• issue_stall (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• is_constant (simtix::stat::ScalarBase)
• is_constant_ (simtix::stat::ScalarBase)
• initialized (simtix::system::SingleCoreSystem)
• initialized_ (simtix::system::SingleCoreSystem)
• Init (simtix::trace::KonataTracer, simtix::trace::OstreamTracer)
• Input (simtix::uvm::FrontendGolden::Input)
• issuing_warps (simtix::uvm::FrontendGolden::Input)

j

• jal_ (simtix::InstrJal)
• jalr_ (simtix::InstrJalr)

k

• ktrace_path (SimConfig)
• kThreadsPerWarp (simtix::AtomicArbitrator, simtix::PipelinedArbitrator, simtix::pipelined::PipelinedSMImpl)
• kWarpsPerCore (simtix::AtomicArbitrator, simtix::AtomicSMImpl, simtix::PipelinedArbitrator, simtix::pipelined::PipelinedSMImpl)
• kCoalescingGranularity (simtix::CoalescingLoadStoreUnit)
• kMemPorts (simtix::CoalescingLoadStoreUnit)
• kReadPorts (simtix::PipelinedArbitrator)
• kRegfileBanks (simtix::PipelinedArbitrator)
• kSharedPorts (simtix::PipelinedArbitrator)
• kSwizzle (simtix::PipelinedArbitrator)
• kWarpsPerWarpGroup (simtix::PipelinedArbitrator, simtix::pipelined::PCGenStage, simtix::pipelined::PipelinedSMImpl)
• kWritePorts (simtix::PipelinedArbitrator)
• kDefaultParam (simtix::mem::BankedMemory, simtix::mem::Cache, simtix::mem::NBHBCache, simtix::mem::SimpleMemory, simtix::pipelined::PipelinedSM)
• kBanks (simtix::mem::BankedMemory::Impl, simtix::mem::BankedMemory::Param, simtix::mem::Cache::Param, simtix::mem::CacheImpl, simtix::mem::DataArray, simtix::mem::NBHBCacheImpl, simtix::mem::TagArray)
• kInterleaveGranularity (simtix::mem::BankedMemory::Impl, simtix::mem::BankedMemory::Param)
• kLatencyCycles (simtix::mem::BankedMemory::Impl, simtix::mem::BankedMemory::Param, simtix::mem::SimpleMemory::Param)
• kOutputFifoDepth (simtix::mem::BankedMemory::Param, simtix::mem::SimpleMemory::Param)
• kSizeBytes (simtix::mem::BankedMemory::Param, simtix::mem::Cache::Param, simtix::mem::CacheImpl, simtix::mem::DataArray, simtix::mem::SimpleMemory::Param, simtix::mem::TagArray)
• kBlockSizeBytes (simtix::mem::Cache::Param, simtix::mem::CacheImpl, simtix::mem::DataArray, simtix::mem::MshrFile, simtix::mem::NBHBCacheImpl, simtix::mem::TagArray)
• kCoreReqQueueDepth (simtix::mem::Cache::Param)
• kCoreRespQueueDepth (simtix::mem::Cache::Param)
• kDataArrayReqQueueDepth (simtix::mem::Cache::Param, simtix::mem::MshrFile)
• kMSHRs (simtix::mem::Cache::Param)
• kMemRespQueueDepth (simtix::mem::Cache::Param)
• kMshrCoreReqQueueDepth (simtix::mem::Cache::Param)
• kNonCacheableQueueDepth (simtix::mem::Cache::Param)
• kNonCacheableRegions (simtix::mem::Cache::Param)
• kReplacementPolicy (simtix::mem::Cache::Param, simtix::mem::TagArray)
• kWays (simtix::mem::Cache::Param, simtix::mem::CacheImpl, simtix::mem::DataArray, simtix::mem::TagArray)
• kWriteBuffers (simtix::mem::Cache::Param)
• kWriteHitPolicy (simtix::mem::Cache::Param, simtix::mem::CacheImpl, simtix::mem::TagArray)
• kWriteMissPolicy (simtix::mem::Cache::Param, simtix::mem::CacheImpl)
• kSets (simtix::mem::DataArray, simtix::mem::TagArray)
• kernel_arg (simtix::opencl::Kernel, simtix::opencl::WorkGroup)
• kernel_id (simtix::opencl::Kernel, simtix::system::TaskDispatcher::CompletionInfo)
• kernel_pc (simtix::opencl::Kernel, simtix::opencl::WorkGroup)
• kCommitWidth (simtix::pipelined::CommitStage, simtix::pipelined::PipelinedSMImpl)
• kDecodeWidth (simtix::pipelined::DecodeStage, simtix::pipelined::PipelinedSMImpl)
• kExecuteWidth (simtix::pipelined::ExecuteStage, simtix::pipelined::PipelinedSMImpl)
• kFetchWidth (simtix::pipelined::InstrBuffer, simtix::pipelined::PCGenStage, simtix::pipelined::PipelinedSMImpl)
• kInstrStreamVariants (simtix::pipelined::InstrBuffer)
• kOperandCollectWidth (simtix::pipelined::OperandCollectStage, simtix::pipelined::PipelinedSMImpl)
• kLeaderWarps (simtix::pipelined::PCGenStage)
• kOutstandingInstrFetches (simtix::pipelined::PCGenStage)
• kScheduleWidth (simtix::pipelined::PipelinedSMImpl, simtix::pipelined::ScheduleStage)
• kDelayCycles (simtix::sim::DelayQueue)
• kernel (simtix::system::SingleCoreSystem::Config)
• KonataRetireReporter (simtix::trace::KonataRetireReporter)
• KonataTracer (simtix::trace::KonataTracer)
• kofs_ (tb::Testbed)

l

• LastStatus (simtix::AtomicSMImpl)
• last_status_ (simtix::AtomicSMImpl)
• lsu (simtix::AtomicSMImpl, simtix::BaseSMImpl, simtix::Warp, simtix::pipelined::PipelinedSMImpl)
• lane_utilization_rate (simtix::BaseSMImpl::WorkGroupStat)
• line_buf_ (simtix::CoalescingLoadStoreUnit)
• line_addr (simtix::CoalescingLoadStoreUnit::MemRequest)
• latency_ (simtix::FixedLatencyUnit, simtix::mem::SimpleMemory::Impl)
• lb_ (simtix::InstrLoad)
• lbu_ (simtix::InstrLoad)
• ld_ (simtix::InstrLoad)
• lh_ (simtix::InstrLoad)
• lhu_ (simtix::InstrLoad)
• lw_ (simtix::InstrLoad)
• lwu_ (simtix::InstrLoad)
• lui_ (simtix::InstrLui)
• Lrr (simtix::Lrr)
• LowerFunctPriority (simtix::Thread)
• LowerPriority (simtix::Thread)
• leader_warp_list_ (simtix::WarpSched)
• line (simtix::mem::CacheImpl::DataArrayRequest)
• local_size (simtix::opencl::Kernel, simtix::opencl::WorkGroup)
• lsu_stall (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• lmem_ (simtix::system::SingleCoreSystem)
• lmem_cfg (simtix::system::SingleCoreSystem::Config)
• Launch (simtix::system::TaskDispatcher, simtix::system::TaskDispatcherImpl)

m

• max_ticks (SimConfig)
• max_barrier_ids (simtix::ArchParamBuilder)
• max_function_priority_level (simtix::ArchParamBuilder, simtix::Thread)
• max_priority_level (simtix::ArchParamBuilder, simtix::Thread)
• mhartid_base (simtix::ArchParamBuilder)
• mcycle (simtix::AtomicSM, simtix::BaseSM, simtix::BaseSMImpl, simtix::pipelined::PipelinedSM)
• minstrets (simtix::AtomicSM, simtix::BaseSM, simtix::BaseSMImpl, simtix::pipelined::PipelinedSM)
• mcause (simtix::BaseSM::FaultStatus)
• mepc (simtix::BaseSM::FaultStatus)
• mtval (simtix::BaseSM::FaultStatus)
• marchid (simtix::BaseSMImpl)
• marchid_ (simtix::BaseSMImpl)
• mcycle_ (simtix::BaseSMImpl)
• minstrets_ (simtix::BaseSMImpl)
• mvendorid (simtix::BaseSMImpl)
• mvendorid_ (simtix::BaseSMImpl)
• mem_req_buf_ (simtix::CoalescingLoadStoreUnit)
• mem_req_queues_ (simtix::CoalescingLoadStoreUnit)
• may_change_ctrl_flow (simtix::Instr, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr)
• mnemonic_ (simtix::Instr)
• may_change_ctrl_flow_ (simtix::InstrFormosa)
• mul_ (simtix::InstrOp)
• mulh_ (simtix::InstrOp)
• mulhsu_ (simtix::InstrOp)
• mulhu_ (simtix::InstrOp)
• mulw_ (simtix::InstrOp32)
• minmax_name (simtix::InstrOpFp)
• minmax_op (simtix::InstrOpFp)
• mv1_name (simtix::InstrOpFp)
• mv1_op (simtix::InstrOpFp)
• max_priority_f_level_ (simtix::Thread, simtix::Warp)
• max_priority_level_ (simtix::Thread, simtix::Warp)
• mhartid_ (simtix::Thread)
• mcause_ (simtix::Warp)
• mepc_ (simtix::Warp)
• minstret (simtix::Warp)
• minstret_ (simtix::Warp)
• mtval_ (simtix::Warp)
• mem_resp_queue_ (simtix::mem::CacheImpl)
• mshr_file_ (simtix::mem::CacheImpl)
• mshr_id (simtix::mem::CacheImpl::MemResponse)
• MemoryInterface (simtix::mem::MemoryInterface)
• MshrFile (simtix::mem::MshrFile)
• mshrs_ (simtix::mem::MshrFile)
• MSHR (simtix::mem::MshrFile::MSHR)
• mem_ (simtix::mem::SimpleMemory::Impl)
• max_bandwidth_ (simtix::mem::XBar::Impl)
• m (simtix::mem::XBar::Impl::slave_t)
• mem_ports (simtix::pipelined::PipelinedSM::ParamBuilder)
• mems_ (simtix::system::SingleCoreSystem)
• mmap (simtix::system::SingleCoreSystem::Config)
• mem_type (simtix::system::SingleCoreSystem::Config::Mem)
• mock_ibuffer_ (simtix::uvm::FrontendGoldenImpl)
• MockInstrBuffer (simtix::uvm::MockInstrBuffer)

n

• NotifyCtrlFlowChange (simtix::AtomicSMImpl, simtix::BaseSMImpl, simtix::pipelined::InstrBuffer, simtix::pipelined::PipelinedSMImpl)
• NotifyBarrier (simtix::BaseSMImpl)
• NotifyException (simtix::BaseSMImpl, simtix::pipelined::PipelinedSMImpl)
• name (simtix::BaseSMImpl, simtix::sim::Clocked, simtix::stat::Group, simtix::stat::StatBase)
• name_ (simtix::BaseSMImpl, simtix::PipelinedArbitrator, simtix::WarpSched, simtix::mem::BankedMemory::Impl, simtix::mem::CacheImpl, simtix::mem::NBHBCacheImpl, simtix::mem::SimpleMemory::Impl, simtix::mem::XBar::Impl, simtix::sim::Clocked, simtix::stat::Group, simtix::stat::StatBase)
• num_active_warps (simtix::BaseSMImpl)
• num_active_warps_ (simtix::BaseSMImpl)
• num_threads_per_warp_ (simtix::BaseSMImpl)
• num_warps (simtix::BaseSMImpl)
• num_warps_ (simtix::BaseSMImpl, simtix::WarpSched)
• num_warps_per_warpgroup (simtix::BaseSMImpl)
• num_warps_per_warpgroup_ (simtix::BaseSMImpl, simtix::Warp, simtix::WarpSched)
• NotifyIssue (simtix::Gto, simtix::Lrr, simtix::RRWarpSched, simtix::Warp, simtix::WarpSched, simtix::pipelined::PCGenStage)
• next_pc_ (simtix::InstrBranch, simtix::InstrJal, simtix::InstrJalr)
• nop_ (simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrOp, simtix::InstrOp32, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrOpImm32, simtix::InstrStore, simtix::InstrSystem)
• num_pending_load_ (simtix::InstrLoad)
• num_pending_store_ (simtix::InstrStore)
• NotifyCommit (simtix::Warp)
• num_active_tsws_ (simtix::Warp)
• num_pending_commits_ (simtix::Warp)
• num_threads (simtix::Warp)
• num_threads_ (simtix::Warp)
• num_tsws (simtix::Warp)
• num_valid_threads (simtix::Warp)
• num_valid_threads_ (simtix::Warp)
• NumWarps (simtix::WarpSched)
• next_level_ (simtix::mem::CacheImpl, simtix::mem::NBHBCacheImpl)
• non_cacheable_mem_req_queue_ (simtix::mem::CacheImpl)
• non_cacheable_regions_ (simtix::mem::CacheImpl)
• NotifyFill (simtix::mem::MshrFile, simtix::pipelined::PCGenStage)
• NBHBCache (simtix::mem::NBHBCache)
• NBHBCacheImpl (simtix::mem::NBHBCacheImpl)
• next_pc (simtix::pipelined::InstrBuffer, simtix::pipelined::InstrBuffer::InstrStream)
• NotifyEmpty (simtix::pipelined::PCGenStage)
• num_fetch (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• num_instr_per_lane (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)

o

• operator ArchParam (simtix::ArchParamBuilder)
• outstanding_requests_ (simtix::AtomicLoadStoreUnit)
• on_resp (simtix::AtomicLoadStoreUnit::Request, simtix::CoalescingLoadStoreUnit::CoreRequest, simtix::mem::CacheImpl::CoreRequest, simtix::mem::SimpleMemory::Impl::Request)
• operator= (simtix::AtomicLoadStoreUnit::Request, simtix::CoalescingLoadStoreUnit::CoreRequest, simtix::InstrPool, simtix::InstrPtr, simtix::mem::BankedMemory, simtix::mem::CacheImpl::CoreRequest, simtix::mem::SimpleMemory, simtix::mem::SimpleMemory::Impl, simtix::stat::Formula, simtix::stat::PostfixExpr, simtix::stat::Scalar, simtix::system::SingleCoreSystem, simtix::trace::KonataRetireReporter, simtix::trace::KonataTracer, simtix::trace::OstreamTracer, tb::Testbed)
• OnReady (simtix::BaseArbitrator)
• OnResp (simtix::BaseLoadStoreUnit, simtix::mem::CacheImpl, simtix::mem::MemoryInterface, simtix::mem::NBHBCacheImpl)
• operator< (simtix::CoalescingLoadStoreUnit::MemRequest)
• operator== (simtix::CoalescingLoadStoreUnit::MemRequest)
• Opcode (simtix::Instr)
• OperandCollect (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem, simtix::InstrTrap, simtix::pipelined::OperandCollectStage)
• opcode (simtix::Instr)
• opcode_ (simtix::Instr)
• Op (simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem)
• op_ (simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem)
• or_ (simtix::InstrOp)
• Op32 (simtix::InstrOp32, simtix::InstrOpImm32)
• op32_ (simtix::InstrOp32, simtix::InstrOpImm32)
• ori_ (simtix::InstrOpImm)
• operator-> (simtix::InstrPtr)
• on_ready (simtix::PipelinedArbitrator::Request)
• operator[] (simtix::mem::BankedMemory, simtix::mem::Cache, simtix::mem::CacheImpl, simtix::mem::MemoryInterface, simtix::mem::NBHBCache, simtix::mem::SimpleMemory, simtix::mem::SimpleMemory::Impl, simtix::mem::XBar, simtix::mem::XBar::Impl, simtix::stat::Vector)
• OperandCollectStage (simtix::pipelined::OperandCollectStage)
• operand_collect_buffer_size (simtix::pipelined::PipelinedSM::ParamBuilder)
• operand_collect_width (simtix::pipelined::PipelinedSM::ParamBuilder)
• operator Param (simtix::pipelined::PipelinedSM::ParamBuilder)
• outstanding_instr_fetches (simtix::pipelined::PipelinedSM::ParamBuilder)
• outstanding_load_stores (simtix::pipelined::PipelinedSM::ParamBuilder)
• operand_collect_stage_ (simtix::pipelined::PipelinedSMImpl)
• operandcollect_iq_ (simtix::pipelined::PipelinedSMImpl)
• operator* (simtix::stat::PostfixExpr, simtix::stat::ScalarBase)
• operator+ (simtix::stat::PostfixExpr, simtix::stat::ScalarBase)
• operator- (simtix::stat::PostfixExpr, simtix::stat::ScalarBase)
• operator/ (simtix::stat::PostfixExpr, simtix::stat::ScalarBase)
• operator double (simtix::stat::Scalar, simtix::stat::ScalarBase, simtix::stat::Vector::Average, simtix::stat::Vector::Sum)
• operator int64_t (simtix::stat::Scalar, simtix::stat::ScalarBase, simtix::stat::Vector::Average, simtix::stat::Vector::Sum)
• operator++ (simtix::stat::Scalar)
• operator+= (simtix::stat::Scalar)
• operator-- (simtix::stat::Scalar)
• operator-= (simtix::stat::Scalar)
• operator PostfixExpr (simtix::stat::ScalarBase)
• os_ (simtix::trace::KonataTracer, simtix::trace::OstreamTracer)
• OstreamTracer (simtix::trace::OstreamTracer)

p

• print_mem (SimConfig)
• print_mem_out (SimConfig)
• param_ (simtix::ArchParamBuilder, simtix::pipelined::PipelinedSM::ParamBuilder)
• PushRegfileReadReq (simtix::AtomicArbitrator, simtix::BaseArbitrator, simtix::PipelinedArbitrator)
• PushRegfileWriteReq (simtix::AtomicArbitrator, simtix::BaseArbitrator, simtix::PipelinedArbitrator)
• PushReadRequest (simtix::AtomicLoadStoreUnit, simtix::BaseLoadStoreUnit, simtix::CoalescingLoadStoreUnit)
• PushWriteRequest (simtix::AtomicLoadStoreUnit, simtix::BaseLoadStoreUnit, simtix::CoalescingLoadStoreUnit)
• Put (simtix::AtomicLoadStoreUnit, simtix::BaseFunctionUnit, simtix::CoalescingLoadStoreUnit, simtix::FixedLatencyUnit, simtix::uvm::FrontendGolden)
• payload (simtix::AtomicLoadStoreUnit::Request, simtix::CoalescingLoadStoreUnit::CoreRequest, simtix::mem::CacheImpl::CoreRequest, simtix::mem::CacheImpl::WriteBufferEntry, simtix::mem::MshrFile::MSHR, simtix::mem::SimpleMemory::Impl::Request)
• Process (simtix::AtomicSM, simtix::BaseSM, simtix::BaseSMImpl, simtix::pipelined::PipelinedSM, simtix::pipelined::PipelinedSMImpl)
• Payload (simtix::BaseLoadStoreUnit, simtix::mem::CacheImpl, simtix::mem::NBHBCacheImpl)
• PushCoreRequest (simtix::CoalescingLoadStoreUnit)
• pending_instrs_ (simtix::CoalescingLoadStoreUnit)
• pc_ (simtix::InstrAuipc, simtix::Thread)
• pool_ (simtix::InstrPool, simtix::InstrPtr)
• PipelinedArbitrator (simtix::PipelinedArbitrator)
• prioritized_leader_wid_ (simtix::RRWarpSched, simtix::pipelined::PCGenStage)
• prioritized_sswid_list_ (simtix::RRWarpSched)
• pc (simtix::Thread)
• priority (simtix::Thread)
• priority_ (simtix::Thread)
• priority_f (simtix::Thread)
• priority_f_ (simtix::Thread)
• pc_busy_ (simtix::Warp)
• pending_write_req_queue_ (simtix::mem::CacheImpl)
• pending_mshr_replay_queue_ (simtix::mem::MshrFile)
• pending_mshr_req_queue (simtix::mem::MshrFile)
• pending_mshr_req_queue_ (simtix::mem::MshrFile)
• Param (simtix::mem::NBHBCache, simtix::pipelined::PipelinedSM::Param, simtix::uvm::FrontendGolden)
• Probe (simtix::mem::TagArray)
• pending_commit_buf_ids_ (simtix::pipelined::CommitStage)
• prioritized_fu_id_ (simtix::pipelined::ExecuteStage)
• pending_req_ids_ (simtix::pipelined::FetchBuf)
• pending_resp_ids_ (simtix::pipelined::FetchBuf)
• ProcessReadyFetchRequests (simtix::pipelined::FetchStage)
• PCGen (simtix::pipelined::PCGenStage)
• PCGenStage (simtix::pipelined::PCGenStage)
• PipelinedSM (simtix::pipelined::PipelinedSM)
• PipelinedSMImpl (simtix::pipelined::PipelinedSMImpl)
• pc_gen_stage_ (simtix::pipelined::PipelinedSMImpl)
• pipelined_arbitrator_ (simtix::pipelined::PipelinedSMImpl)
• pri_ (simtix::sim::Clocked)
• PostfixExpr (simtix::stat::PostfixExpr)
• PushExpr (simtix::stat::PostfixExpr)
• PushScalar (simtix::stat::PostfixExpr)
• parent_ (simtix::stat::StatBase)
• PeekMemory (simtix::system::BaseSystem, simtix::system::SingleCoreSystem)
• PreloadMemory (simtix::system::BaseSystem, simtix::system::SingleCoreSystem)
• pipelined_param (simtix::system::SingleCoreSystem::Config)
• pipelined_param_builder (simtix::system::SingleCoreSystem::Config)
• pending_completion_info_ (simtix::system::TaskDispatcherImpl)
• pending_wg_ (simtix::system::TaskDispatcherImpl)
• Push (simtix::trace::KonataRetireReporter)
• PutTestInput (simtix::uvm::MockInstrBuffer)

r

• ReadRegfile (simtix::AtomicArbitrator, simtix::BaseArbitrator, simtix::PipelinedArbitrator)
• regfile_ (simtix::AtomicArbitrator, simtix::PipelinedArbitrator)
• requesting_ (simtix::AtomicLoadStoreUnit)
• Request (simtix::AtomicLoadStoreUnit::Request, simtix::PipelinedArbitrator::Request, simtix::mem::SimpleMemory::Impl::Request)
• Reset (simtix::AtomicSM, simtix::AtomicSMImpl, simtix::BaseSM, simtix::BaseSMImpl, simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOp32, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrOpImm32, simtix::InstrPtr, simtix::InstrStore, simtix::InstrSystem, simtix::PipelinedArbitrator, simtix::RRWarpSched, simtix::Thread, simtix::Warp, simtix::WarpSched, simtix::pipelined::CommitStage, simtix::pipelined::InstrBuffer, simtix::pipelined::OperandCollectStage, simtix::pipelined::PCGenStage, simtix::pipelined::PipelinedSM, simtix::pipelined::PipelinedSMImpl, simtix::system::TaskDispatcher)
• ResetInstrStatus (simtix::AtomicSMImpl)
• ResetStat (simtix::AtomicSMImpl, simtix::BaseSMImpl, simtix::PipelinedArbitrator, simtix::WarpSched, simtix::mem::Cache, simtix::mem::CacheImpl, simtix::mem::CacheInterface, simtix::mem::NBHBCache, simtix::mem::NBHBCacheImpl, simtix::pipelined::PipelinedSMImpl)
• RespStatus (simtix::BaseLoadStoreUnit, simtix::mem::CacheImpl, simtix::mem::MemoryInterface, simtix::mem::NBHBCacheImpl)
• ReadCSR (simtix::BaseSMImpl, simtix::Thread, simtix::Warp)
• response_instrs_ (simtix::CoalescingLoadStoreUnit)
• ready (simtix::CoalescingLoadStoreUnit::CoreRequest, simtix::pipelined::FetchBuf::Entry)
• Reinitialize (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem, simtix::mem::CacheImpl::WriteBufferEntry)
• rd_ (simtix::Instr)
• rs1_ (simtix::Instr)
• rs2_ (simtix::Instr)
• rd_data_ (simtix::InstrAuipc, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrSystem)
• rs1_data_ (simtix::InstrBranch, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem)
• rs1_data_ready_ (simtix::InstrBranch, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem)
• rs2_data_ (simtix::InstrBranch, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrStore)
• rs2_data_ready_ (simtix::InstrBranch, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrStore)
• rem_ (simtix::InstrOp)
• remu_ (simtix::InstrOp)
• remuw_ (simtix::InstrOp32)
• remw_ (simtix::InstrOp32)
• rm_ (simtix::InstrOpFp, simtix::InstrOpFused)
• rs3_ (simtix::InstrOpFused)
• rs3_data_ (simtix::InstrOpFused)
• rs3_data_ready_ (simtix::InstrOpFused)
• Recycle (simtix::InstrPool, simtix::InstrPoolInterface)
• RecycleInstrIfNotNull (simtix::InstrPtr)
• read_bank_mask_ (simtix::PipelinedArbitrator)
• read_req_buf_ (simtix::PipelinedArbitrator)
• req_buf_ (simtix::PipelinedArbitrator)
• req_buf_arr_ (simtix::PipelinedArbitrator)
• reg_id (simtix::PipelinedArbitrator::Request)
• req_bank (simtix::PipelinedArbitrator::Request)
• RRWarpSched (simtix::RRWarpSched)
• RaiseFunctPriority (simtix::Thread)
• RaisePriority (simtix::Thread)
• ResetPC (simtix::Thread)
• ResetPriority (simtix::Thread)
• RegisterAvailable (simtix::Warp)
• ReleasePC (simtix::Warp)
• ReleaseRegister (simtix::Warp)
• ReservePC (simtix::Warp)
• ReserveRegister (simtix::Warp)
• ResetActiveThreadMask (simtix::Warp)
• ResetScoreboard (simtix::Warp)
• reg_busy_ (simtix::Warp)
• rtv (simtix::Warp)
• rtv_ (simtix::Warp)
• Read (simtix::mem::BankedMemory, simtix::mem::Cache, simtix::mem::DataArray, simtix::mem::MemoryInterface, simtix::mem::NBHBCache, simtix::mem::SimpleMemory, simtix::mem::XBar)
• ReplacementPolicies (simtix::mem::Cache::Param)
• resp_status (simtix::mem::CacheImpl::CoreRequest, simtix::mem::CacheImpl::MemResponse, simtix::mem::SimpleMemory::Impl::Request)
• read_hit (simtix::mem::CacheImpl::Stat)
• read_hit_ratio (simtix::mem::CacheImpl::Stat)
• read_inter_warp_hit (simtix::mem::CacheImpl::Stat)
• read_intra_warp_hit (simtix::mem::CacheImpl::Stat)
• read_miss (simtix::mem::CacheImpl::Stat)
• read_request (simtix::mem::CacheImpl::Stat)
• req_queue_ (simtix::mem::SimpleMemory::Impl)
• resp_queue_ (simtix::mem::SimpleMemory::Impl)
• Replace (simtix::mem::TagArray)
• Route (simtix::mem::XBar, simtix::mem::XBar::Impl)
• RetireReadyCommitReqeusts (simtix::pipelined::CommitStage)
• RedirectInstrStream (simtix::pipelined::InstrBuffer)
• Ready (simtix::pipelined::PCGenStage)
• read_ports (simtix::pipelined::PipelinedSM::ParamBuilder)
• regfile_banks (simtix::pipelined::PipelinedSM::ParamBuilder)
• Register (simtix::sim::Clocked)
• Reduction (simtix::stat::Vector::Reduction)
• Run (simtix::system::BaseSystem, simtix::system::SingleCoreSystem, tb::Testbed)
• running_kernel_ (simtix::system::TaskDispatcherImpl)
• retire_list_ (simtix::trace::KonataRetireReporter)
• retire_id (simtix::trace::KonataRetireReporter::InstrRetire)
• ResetTestInput (simtix::uvm::MockInstrBuffer)
• Report (tb::Testbed)

s

• size (MemConfig, simtix::InstrPool, simtix::mem::Cache::Param::NonCacheableEntry, simtix::mem::MemoryInterface::Payload, simtix::pipelined::InstrBuffer, simtix::system::SingleCoreSystem::Config::Mem)
• stat_path (SimConfig)
• sys_cfg (SimConfig)
• stat (simtix::AtomicSM, simtix::AtomicSMImpl, simtix::BaseSM, simtix::BaseSMImpl, simtix::PipelinedArbitrator, simtix::WarpSched, simtix::mem::BankedMemory, simtix::mem::Cache, simtix::mem::CacheInterface, simtix::mem::NBHBCache, simtix::pipelined::PipelinedSM, simtix::pipelined::PipelinedSMImpl, simtix::system::SingleCoreSystem)
• status (simtix::AtomicSM, simtix::BaseSM, simtix::Warp, simtix::mem::CacheImpl::DataArrayRequest, simtix::pipelined::PipelinedSM, simtix::system::TaskDispatcher::CompletionInfo, simtix::system::TaskDispatcher)
• Stat (simtix::AtomicSMImpl::Stat, simtix::BaseSMImpl::Stat, simtix::PipelinedArbitrator::Stat, simtix::WarpSched::Stat, simtix::mem::BankedMemory::Impl::Stat, simtix::mem::CacheImpl::Stat, simtix::mem::NBHBCacheImpl::Stat, simtix::pipelined::PipelinedSMImpl::Stat)
• stat_ (simtix::AtomicSMImpl, simtix::PipelinedArbitrator, simtix::WarpSched, simtix::mem::BankedMemory::Impl, simtix::mem::CacheImpl, simtix::mem::NBHBCacheImpl, simtix::pipelined::PipelinedSMImpl, simtix::system::SingleCoreSystem, tb::Testbed)
• Status (simtix::BaseSM, simtix::Warp, simtix::mem::CacheImpl::DataArrayRequest, simtix::system::TaskDispatcher, simtix::system::TaskDispatcher::CompletionInfo)
• scheduler_ (simtix::BaseSMImpl)
• set_mcycle (simtix::BaseSMImpl)
• status_ (simtix::BaseSMImpl, simtix::Warp, simtix::system::TaskDispatcherImpl)
• strb_buf_ (simtix::CoalescingLoadStoreUnit)
• set_ssw (simtix::Instr)
• ssw_ (simtix::Instr, simtix::InstrPtr)
• sswid (simtix::Instr)
• set_priority_ (simtix::InstrFormosa)
• sll_ (simtix::InstrOp)
• slt_ (simtix::InstrOp)
• sltu_ (simtix::InstrOp)
• sra_ (simtix::InstrOp)
• srl_ (simtix::InstrOp)
• sub_ (simtix::InstrOp)
• sllw_ (simtix::InstrOp32)
• sraw_ (simtix::InstrOp32)
• srlw_ (simtix::InstrOp32)
• subw_ (simtix::InstrOp32)
• sgnj_name (simtix::InstrOpFp, simtix::InstrOpFused)
• sgnj_op (simtix::InstrOpFp, simtix::InstrOpFused)
• slli_ (simtix::InstrOpImm)
• slti_ (simtix::InstrOpImm)
• sltiu_ (simtix::InstrOpImm)
• srai_ (simtix::InstrOpImm)
• srli_ (simtix::InstrOpImm)
• slliw_ (simtix::InstrOpImm32)
• sraiw_ (simtix::InstrOpImm32)
• srliw_ (simtix::InstrOpImm32)
• set_first_stage_name (simtix::InstrPtr)
• set_flushed (simtix::InstrPtr)
• ssw (simtix::InstrPtr)
• sized_queue_ (simtix::InstrQueue, simtix::sim::GenericDelayQueue)
• sb_ (simtix::InstrStore)
• sd_ (simtix::InstrStore)
• sh_ (simtix::InstrStore)
• sw_ (simtix::InstrStore)
• SelectWarp (simtix::RRWarpSched, simtix::WarpSched)
• selected_leader_ssw_ (simtix::RRWarpSched)
• selected_leader_wid_ (simtix::RRWarpSched)
• SetPriority (simtix::Thread)
• set_pc (simtix::Thread)
• set_xcllx (simtix::Thread)
• set_xclly (simtix::Thread)
• set_xcllz (simtix::Thread)
• ScoreboardClean (simtix::Warp)
• set_active_thread_mask (simtix::Warp)
• set_bid (simtix::Warp)
• set_mcause (simtix::Warp)
• set_mepc (simtix::Warp)
• set_mtval (simtix::Warp)
• set_num_active_tsws (simtix::Warp)
• set_status (simtix::Warp)
• set_wc (simtix::Warp)
• sm_ (simtix::Warp, simtix::pipelined::CommitStage, simtix::pipelined::DecodeStage, simtix::pipelined::ExecuteStage, simtix::pipelined::FetchStage, simtix::pipelined::InstrBuffer, simtix::pipelined::OperandCollectStage, simtix::pipelined::PCGenStage, simtix::pipelined::ScheduleStage, simtix::system::SingleCoreSystem)
• sswpc (simtix::Warp)
• sswpc_ (simtix::Warp)
• swap_active_thread_mask (simtix::Warp)
• strb_buf (simtix::mem::CacheImpl::WriteBufferEntry)
• strb (simtix::mem::MemoryInterface::Payload)
• SimpleMemory (simtix::mem::SimpleMemory)
• size_ (simtix::mem::SimpleMemory::Impl)
• slaves_ (simtix::mem::XBar::Impl)
• ServePendingFetchReq (simtix::pipelined::FetchBuf)
• ServePendingFetchResp (simtix::pipelined::FetchBuf)
• set_fetch_pc (simtix::pipelined::InstrBuffer)
• SswValidBits (simtix::pipelined::PCGenStage)
• starving_leader_warps_ (simtix::pipelined::PCGenStage)
• schedule_width (simtix::pipelined::PipelinedSM::ParamBuilder)
• shared_ports (simtix::pipelined::PipelinedSM::ParamBuilder)
• swizzle (simtix::pipelined::PipelinedSM::ParamBuilder)
• schedule_iq_ (simtix::pipelined::PipelinedSMImpl)
• schedule_stage_ (simtix::pipelined::PipelinedSMImpl)
• Schedule (simtix::pipelined::ScheduleStage)
• ScheduleStage (simtix::pipelined::ScheduleStage)
• SizedQueue (simtix::sim::SizedQueue)
• Storage (simtix::stat::Formula, simtix::stat::Scalar, simtix::stat::Vector)
• Scalar (simtix::stat::Scalar)
• storage_ (simtix::stat::Scalar, simtix::stat::Vector)
• ScalarBase (simtix::stat::ScalarBase)
• StatBase (simtix::stat::StatBase)
• Sum (simtix::stat::Vector::Sum)
• sum (simtix::stat::Vector)
• sum_ (simtix::stat::Vector)
• SingleCoreSystem (simtix::system::SingleCoreSystem)
• simple_param (simtix::system::SingleCoreSystem::Config::Mem)
• sm_type (simtix::system::SingleCoreSystem::Config)
• SingleCoreSystemStat (simtix::system::SingleCoreSystem::SingleCoreSystemStat)
• sm (simtix::system::SingleCoreSystem)
• sm_list_ (simtix::system::TaskDispatcherImpl)
• starving_warps (simtix::uvm::FrontendGolden::Input)
• start_time_ (tb::Testbed)
• system_ (tb::Testbed)
• sim_freq (tb::Testbed::TestbedStat)
• sim_ticks (tb::Testbed::TestbedStat)
• sim_time (tb::Testbed::TestbedStat)

t

• threads_per_warp (simtix::ArchParamBuilder)
• ToRegfileIndex (simtix::AtomicArbitrator, simtix::PipelinedArbitrator)
• Tick (simtix::AtomicLoadStoreUnit, simtix::AtomicSM, simtix::AtomicSMImpl, simtix::BaseSMImpl, simtix::CoalescingLoadStoreUnit, simtix::mem::BankedMemory, simtix::mem::Cache, simtix::mem::NBHBCache, simtix::mem::SimpleMemory, simtix::mem::SimpleMemory::Impl, simtix::mem::XBar, simtix::mem::XBar::Impl, simtix::pipelined::PipelinedSM, simtix::pipelined::PipelinedSMImpl, simtix::sim::Clocked, simtix::sim::FcfsDelayQueue, simtix::sim::GenericDelayQueue, simtix::system::TaskDispatcher, simtix::trace::KonataRetireReporter, simtix::uvm::FrontendGolden, simtix::uvm::FrontendGoldenImpl)
• total_active_lanes (simtix::BaseSMImpl::WorkGroupStat)
• total_arithmetic_instr (simtix::BaseSMImpl::WorkGroupStat)
• total_branch_instr (simtix::BaseSMImpl::WorkGroupStat)
• total_custom_instr (simtix::BaseSMImpl::WorkGroupStat)
• total_fp_instr (simtix::BaseSMImpl::WorkGroupStat)
• total_instret (simtix::BaseSMImpl::WorkGroupStat)
• total_issue_lanes (simtix::BaseSMImpl::WorkGroupStat)
• total_jump_instr (simtix::BaseSMImpl::WorkGroupStat)
• total_load_instr (simtix::BaseSMImpl::WorkGroupStat)
• total_store_instr (simtix::BaseSMImpl::WorkGroupStat)
• total_system_instr (simtix::BaseSMImpl::WorkGroupStat)
• ToLineAddr (simtix::CoalescingLoadStoreUnit, simtix::mem::CacheImpl, simtix::mem::DataArray, simtix::mem::MshrFile, simtix::mem::TagArray)
• ToLineOffset (simtix::CoalescingLoadStoreUnit, simtix::mem::DataArray)
• tswid (simtix::Instr)
• tswid_ (simtix::Instr)
• ToRegfileBank (simtix::PipelinedArbitrator)
• total_read_requests (simtix::PipelinedArbitrator::Stat, simtix::mem::BankedMemory::Impl::Stat, simtix::mem::NBHBCacheImpl::Stat)
• total_requests (simtix::PipelinedArbitrator::Stat, simtix::mem::BankedMemory::Impl::Stat, simtix::mem::NBHBCacheImpl::Stat)
• total_write_requests (simtix::PipelinedArbitrator::Stat, simtix::mem::BankedMemory::Impl::Stat, simtix::mem::NBHBCacheImpl::Stat)
• Thread (simtix::Thread)
• tid (simtix::Thread)
• tid_ (simtix::Thread)
• thread (simtix::Warp)
• threads_ (simtix::Warp)
• tsw_active_threads (simtix::Warp)
• tsw_commit_mask_ (simtix::Warp)
• ToBankIndex (simtix::mem::BankedMemory::Impl, simtix::mem::NBHBCacheImpl)
• ToBankedAddr (simtix::mem::BankedMemory::Impl)
• ToBankedAddrOffset (simtix::mem::BankedMemory::Impl)
• timestamp (simtix::mem::CacheImpl::CoreRequest, simtix::mem::CacheImpl::WriteBufferEntry, simtix::mem::TagArray::Tag)
• total_hit (simtix::mem::CacheImpl::Stat)
• total_hit_ratio (simtix::mem::CacheImpl::Stat)
• total_miss (simtix::mem::CacheImpl::Stat)
• total_request (simtix::mem::CacheImpl::Stat)
• tag_array_ (simtix::mem::CacheImpl)
• ToBankAddr (simtix::mem::DataArray, simtix::mem::TagArray)
• ToSetIndex (simtix::mem::DataArray, simtix::mem::TagArray)
• TagArray (simtix::mem::TagArray)
• tag (simtix::mem::TagArray::Tag)
• ToFetchAddress (simtix::pipelined::PCGenStage)
• tsw_num_freq (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• Tabularize (simtix::stat::Formula, simtix::stat::Group, simtix::stat::Scalar, simtix::stat::ScalarBase, simtix::stat::StatBase, simtix::stat::Vector)
• TearDown (simtix::system::BaseSystem, simtix::system::SingleCoreSystem)
• tick_executed (simtix::system::SingleCoreSystem::SingleCoreSystemStat)
• td (simtix::system::SingleCoreSystem)
• td_ (simtix::system::SingleCoreSystem)
• TaskDispatcher (simtix::system::TaskDispatcher)
• TaskDispatcherImpl (simtix::system::TaskDispatcherImpl)
• test_q_ (simtix::uvm::FrontendGoldenImpl)
• Testbed (tb::Testbed)
• TestbedStat (tb::Testbed::TestbedStat)

u

• unique_id (simtix::InstrPtr, simtix::trace::KonataRetireReporter::InstrRetire)
• unique_id_ (simtix::InstrPtr)
• uimm_ (simtix::InstrSystem)
• UpdateCommittedInstrStat (simtix::Warp)
• UpdateStat (simtix::mem::CacheImpl)
• UpdateTag (simtix::mem::TagArray)
• upper (simtix::mem::XBar::Impl::slave_t)
• UpdateFetchPC (simtix::pipelined::InstrBuffer)
• Unregister (simtix::sim::Clocked)
• unit (simtix::stat::StatBase)
• unit_ (simtix::stat::StatBase)

v

• valid (simtix::AtomicLoadStoreUnit::Request, simtix::CoalescingLoadStoreUnit::CoreRequest, simtix::mem::MshrFile::MSHR, simtix::mem::TagArray::Tag, simtix::pipelined::InstrBuffer::InstrStream, simtix::pipelined::InstrBuffer, simtix::pipelined::PCGenStage::FetchFilterEntry)
• valid_leader_warps_ (simtix::BaseSMImpl)
• VectorLoad (simtix::InstrLoad)
• VectorStore (simtix::InstrStore)
• victim (simtix::mem::CacheImpl::DataArrayRequest, simtix::mem::TagArray::Rep)
• Valid (simtix::mem::XBar, simtix::mem::XBar::Impl)
• Vector (simtix::stat::Vector)
• vector_ (simtix::stat::Vector::Reduction)

w

• WarpSchedPolicies (simtix::ArchParam)
• warp_sched_policy (simtix::ArchParamBuilder)
• warps_per_core (simtix::ArchParamBuilder)
• warps_per_warp_group (simtix::ArchParamBuilder)
• WriteRegfile (simtix::AtomicArbitrator, simtix::BaseArbitrator, simtix::PipelinedArbitrator)
• WorkGroupStat (simtix::AtomicSMImpl::WorkGroupStat, simtix::BaseSMImpl::WorkGroupStat, simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• wg_stat (simtix::AtomicSMImpl, simtix::BaseSMImpl, simtix::pipelined::PipelinedSMImpl)
• wg_stat_ (simtix::AtomicSMImpl, simtix::pipelined::PipelinedSMImpl)
• wc (simtix::BaseSMImpl::Barrier, simtix::Warp)
• warps (simtix::BaseSMImpl)
• warps_ (simtix::BaseSMImpl)
• wg_completion_barrier_ (simtix::BaseSMImpl)
• wg_serial_id_ (simtix::BaseSMImpl)
• wid_ (simtix::CoalescingLoadStoreUnit, simtix::Warp)
• warp_ (simtix::Instr, simtix::InstrPtr, simtix::Thread)
• wid (simtix::Instr, simtix::InstrPtr, simtix::Thread, simtix::Warp, simtix::mem::CacheImpl::MemResponse, simtix::mem::MemoryInterface::Payload, simtix::mem::TagArray::Tag, simtix::uvm::FrontendGolden::Output)
• wpc (simtix::Instr, simtix::InstrPtr, simtix::Warp, simtix::uvm::FrontendGolden::Output)
• wpc_ (simtix::Instr, simtix::InstrPtr, simtix::Warp)
• write_bank_mask_ (simtix::PipelinedArbitrator)
• write_req_buf_ (simtix::PipelinedArbitrator)
• WriteCSR (simtix::Thread)
• Warp (simtix::Warp)
• wc_ (simtix::Warp)
• WarpSched (simtix::WarpSched)
• warp_sched_stall (simtix::WarpSched::Stat)
• Write (simtix::mem::BankedMemory, simtix::mem::Cache, simtix::mem::DataArray, simtix::mem::MemoryInterface, simtix::mem::NBHBCache, simtix::mem::SimpleMemory, simtix::mem::XBar)
• WriteHitPolicies (simtix::mem::Cache::Param)
• WriteMissPolicies (simtix::mem::Cache::Param)
• way (simtix::mem::CacheImpl::DataArrayRequest, simtix::mem::TagArray::Rep)
• write_hit (simtix::mem::CacheImpl::Stat)
• write_hit_ratio (simtix::mem::CacheImpl::Stat)
• write_inter_warp_hit (simtix::mem::CacheImpl::Stat)
• write_intra_warp_hit (simtix::mem::CacheImpl::Stat)
• write_miss (simtix::mem::CacheImpl::Stat)
• write_request (simtix::mem::CacheImpl::Stat)
• WriteBufferEntry (simtix::mem::CacheImpl::WriteBufferEntry)
• write_buffers_ (simtix::mem::CacheImpl)
• warp_lists_ (simtix::pipelined::PCGenStage)
• write_ports (simtix::pipelined::PipelinedSM::ParamBuilder)
• WarpAdditionalCheck (simtix::pipelined::PipelinedSMImpl)

x

• xclgoffx (simtix::BaseSMImpl)
• xclgoffx_ (simtix::BaseSMImpl)
• xclgoffy (simtix::BaseSMImpl)
• xclgoffy_ (simtix::BaseSMImpl)
• xclgoffz (simtix::BaseSMImpl)
• xclgoffz_ (simtix::BaseSMImpl)
• xclgsx (simtix::BaseSMImpl)
• xclgsx_ (simtix::BaseSMImpl)
• xclgsy (simtix::BaseSMImpl)
• xclgsy_ (simtix::BaseSMImpl)
• xclgsz (simtix::BaseSMImpl)
• xclgsz_ (simtix::BaseSMImpl)
• xclsx (simtix::BaseSMImpl)
• xclsx_ (simtix::BaseSMImpl)
• xclsy (simtix::BaseSMImpl)
• xclsy_ (simtix::BaseSMImpl)
• xclsz (simtix::BaseSMImpl)
• xclsz_ (simtix::BaseSMImpl)
• xclwx (simtix::BaseSMImpl)
• xclwx_ (simtix::BaseSMImpl)
• xclwy (simtix::BaseSMImpl)
• xclwy_ (simtix::BaseSMImpl)
• xclwz (simtix::BaseSMImpl)
• xclwz_ (simtix::BaseSMImpl)
• xdim (simtix::BaseSMImpl)
• xdim_ (simtix::BaseSMImpl)
• xkernelarg (simtix::BaseSMImpl)
• xkernelarg_ (simtix::BaseSMImpl)
• xkernelpc (simtix::BaseSMImpl)
• xkernelpc_ (simtix::BaseSMImpl)
• xmhartidbase (simtix::BaseSMImpl)
• xmhartidbase_ (simtix::BaseSMImpl)
• xor_ (simtix::InstrOp)
• xori_ (simtix::InstrOpImm)
• xcllx_ (simtix::Thread)
• xclly_ (simtix::Thread)
• xcllz_ (simtix::Thread)
• XBar (simtix::mem::XBar)
• xbar_bw (simtix::system::SingleCoreSystem::Config)
• xbar_ (simtix::system::SingleCoreSystem)

~

• ~AtomicArbitrator (simtix::AtomicArbitrator)
• ~AtomicLoadStoreUnit (simtix::AtomicLoadStoreUnit)
• ~Impl (simtix::AtomicSM::Impl, simtix::mem::BankedMemory::Impl, simtix::mem::SimpleMemory::Impl, simtix::pipelined::PipelinedSM::Impl, simtix::uvm::FrontendGolden::Impl)
• ~AtomicSM (simtix::AtomicSM)
• ~AtomicSMImpl (simtix::AtomicSMImpl)
• ~BaseArbitrator (simtix::BaseArbitrator)
• ~BaseFunctionUnit (simtix::BaseFunctionUnit)
• ~BaseSM (simtix::BaseSM)
• ~BaseSMImpl (simtix::BaseSMImpl)
• ~CoalescingLoadStoreUnit (simtix::CoalescingLoadStoreUnit)
• ~Instr (simtix::Instr)
• ~InstrPool (simtix::InstrPool)
• ~InstrPtr (simtix::InstrPtr)
• ~InstrQueue (simtix::InstrQueue)
• ~PipelinedArbitrator (simtix::PipelinedArbitrator)
• ~Warp (simtix::Warp)
• ~WarpSched (simtix::WarpSched)
• ~BankedMemory (simtix::mem::BankedMemory)
• ~Cache (simtix::mem::Cache)
• ~DataArrayRequest (simtix::mem::CacheImpl::DataArrayRequest)
• ~CacheImpl (simtix::mem::CacheImpl)
• ~CacheInterface (simtix::mem::CacheInterface)
• ~DataArray (simtix::mem::DataArray)
• ~MemoryInterface (simtix::mem::MemoryInterface)
• ~MshrFile (simtix::mem::MshrFile)
• ~NBHBCache (simtix::mem::NBHBCache)
• ~SimpleMemory (simtix::mem::SimpleMemory)
• ~TagArray (simtix::mem::TagArray)
• ~XBar (simtix::mem::XBar)
• ~CommitStage (simtix::pipelined::CommitStage)
• ~DecodeStage (simtix::pipelined::DecodeStage)
• ~ExecuteStage (simtix::pipelined::ExecuteStage)
• ~FetchStage (simtix::pipelined::FetchStage)
• ~InstrBuffer (simtix::pipelined::InstrBuffer)
• ~OperandCollectStage (simtix::pipelined::OperandCollectStage)
• ~PCGenStage (simtix::pipelined::PCGenStage)
• ~PipelinedSM (simtix::pipelined::PipelinedSM)
• ~PipelinedSMImpl (simtix::pipelined::PipelinedSMImpl)
• ~ScheduleStage (simtix::pipelined::ScheduleStage)
• ~Clocked (simtix::sim::Clocked)
• ~SizedQueue (simtix::sim::SizedQueue)
• ~BaseSystem (simtix::system::BaseSystem)
• ~SingleCoreSystem (simtix::system::SingleCoreSystem)
• ~TaskDispatcher (simtix::system::TaskDispatcher)
• ~KonataRetireReporter (simtix::trace::KonataRetireReporter)
• ~FrontendGolden (simtix::uvm::FrontendGolden)
• ~FrontendGoldenImpl (simtix::uvm::FrontendGoldenImpl)
• ~MockInstrBuffer (simtix::uvm::MockInstrBuffer)
• ~Testbed (tb::Testbed)

@

• @2 (simtix::system::SingleCoreSystem::Config::Mem)