Class Member Variables

a

• addr (MemConfig, simtix::mem::Cache::Param::NonCacheableEntry, simtix::mem::CacheImpl::DataArrayRequest, simtix::mem::CacheImpl::MemResponse, simtix::mem::MemoryInterface::Payload, simtix::mem::XBar::Impl::slave_t, simtix::pipelined::PCGenStage::FetchFilterEntry, simtix::system::SingleCoreSystem::Config::Mem)
• accepted (simtix::AtomicLoadStoreUnit::Request, simtix::CoalescingLoadStoreUnit::MemRequest)
• atomic_arbitrator_ (simtix::AtomicSMImpl)
• atomic_lsu_ (simtix::AtomicSMImpl)
• arrived_wids (simtix::BaseSMImpl::Barrier)
• active_threads_ (simtix::Instr, simtix::Warp)
• access_fault_ (simtix::InstrLoad, simtix::InstrStore)
• active_threads (simtix::PipelinedArbitrator::Request)
• additional_check_ (simtix::RRWarpSched)
• active_thread_mask_ (simtix::Warp)
• active_tswid_ (simtix::Warp)
• arr_ (simtix::mem::DataArray, simtix::mem::TagArray)
• alu_array_ (simtix::pipelined::ExecuteStage)
• access_fault (simtix::pipelined::FetchBuf::Entry, simtix::uvm::FrontendGolden::Output)
• avg_instr_shared (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• average_ (simtix::stat::Vector)
• arch_param_builder (simtix::system::SingleCoreSystem::Config)
• addr_misaligned (simtix::uvm::FrontendGolden::Output)

b

• barriers_ (simtix::BaseSMImpl)
• bar_wc_ (simtix::InstrFormosa)
• barrier_valid_ (simtix::InstrFormosa)
• bid_ (simtix::InstrFormosa, simtix::Warp)
• buf_ (simtix::InstrLoad, simtix::InstrStore, simtix::pipelined::FetchBuf, simtix::pipelined::InstrBuffer)
• bank_mask_ (simtix::PipelinedArbitrator)
• bank_mask_arr_ (simtix::PipelinedArbitrator)
• bank_available (simtix::PipelinedArbitrator::Stat, simtix::mem::BankedMemory::Impl::Stat, simtix::mem::NBHBCacheImpl::Stat)
• bank_conflict (simtix::PipelinedArbitrator::Stat, simtix::mem::BankedMemory::Impl::Stat, simtix::mem::NBHBCacheImpl::Stat)
• bank_utilization (simtix::PipelinedArbitrator::Stat, simtix::mem::BankedMemory::Impl::Stat, simtix::mem::NBHBCacheImpl::Stat)
• bank_occupied_ (simtix::mem::BankedMemory::Impl, simtix::mem::NBHBCacheImpl)
• banks_ (simtix::mem::BankedMemory::Impl, simtix::mem::NBHBCacheImpl)
• bytes (simtix::pipelined::FetchBuf::Entry)
• busy_ (simtix::sim::Clocked)
• banked_param (simtix::system::SingleCoreSystem::Config::Mem)

c

• cid_ (simtix::BaseSMImpl)
• cycle (simtix::BaseSMImpl::Stat, simtix::BaseSMImpl::WorkGroupStat)
• committed_arithmetic_instr (simtix::BaseSMImpl::WorkGroupStat)
• committed_branch_instr (simtix::BaseSMImpl::WorkGroupStat)
• committed_custom_instr (simtix::BaseSMImpl::WorkGroupStat)
• committed_fp_instr (simtix::BaseSMImpl::WorkGroupStat)
• committed_jump_instr (simtix::BaseSMImpl::WorkGroupStat)
• committed_load_instr (simtix::BaseSMImpl::WorkGroupStat)
• committed_store_instr (simtix::BaseSMImpl::WorkGroupStat)
• committed_system_instr (simtix::BaseSMImpl::WorkGroupStat)
• custom_instr_ratio (simtix::BaseSMImpl::WorkGroupStat)
• core_req_buf_ (simtix::CoalescingLoadStoreUnit)
• committed_ (simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem)
• cmp_name (simtix::InstrOpFp)
• cmp_op (simtix::InstrOpFp)
• cvt1_name (simtix::InstrOpFp)
• cvt1_op (simtix::InstrOpFp)
• cvt2_name (simtix::InstrOpFp)
• cvt2_op (simtix::InstrOpFp)
• csr_ (simtix::InstrSystem)
• core_req_queue_ (simtix::mem::CacheImpl)
• core_resp_queue_ (simtix::mem::CacheImpl)
• core_req (simtix::mem::CacheImpl::DataArrayRequest, simtix::mem::CacheImpl::MemResponse)
• core_req_queue (simtix::mem::MshrFile::MSHR)
• curr_bandwidth_ (simtix::mem::XBar::Impl)
• commit_buf_ (simtix::pipelined::CommitStage)
• capacity_ (simtix::pipelined::InstrBuffer, simtix::sim::SizedQueue)
• collect_buf_ (simtix::pipelined::OperandCollectStage)
• coalescing_lsu_ (simtix::pipelined::PipelinedSMImpl)
• commit_iq_ (simtix::pipelined::PipelinedSMImpl)
• commit_stage_ (simtix::pipelined::PipelinedSMImpl)
• can_share_instr (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• clocked_objs_map_ (simtix::sim::Clocked)
• cur_tick_ (simtix::sim::Clocked)
• child_groups_ (simtix::stat::Group)
• child_stats_ (simtix::stat::Group)
• constant_ (simtix::stat::ScalarBase)
• cfg_ (simtix::system::SingleCoreSystem, tb::Testbed)
• capacious_warps (simtix::uvm::FrontendGolden::Input)
• capacious_warps_ (simtix::uvm::MockInstrBuffer)

d

• dmem_port_ (simtix::BaseLoadStoreUnit, simtix::BaseSMImpl)
• delay_queue_ (simtix::FixedLatencyUnit, simtix::mem::SimpleMemory::Impl)
• data (simtix::PipelinedArbitrator::Request, simtix::mem::MemoryInterface::Payload)
• data_arr (simtix::PipelinedArbitrator::Request)
• dual_path_stall (simtix::WarpSched::Stat)
• data_array_ (simtix::mem::CacheImpl)
• data_array_req_queue_ (simtix::mem::CacheImpl)
• data_buf (simtix::mem::CacheImpl::WriteBufferEntry, simtix::mem::MshrFile::MSHR)
• dirty (simtix::mem::TagArray::Tag)
• dim (simtix::opencl::Kernel, simtix::opencl::WorkGroup)
• dcache_ (simtix::pipelined::PipelinedSMImpl, simtix::system::SingleCoreSystem)
• decode_iq_ (simtix::pipelined::PipelinedSMImpl)
• decode_stage_ (simtix::pipelined::PipelinedSMImpl)
• delays_ (simtix::sim::GenericDelayQueue)
• desc_ (simtix::stat::StatBase)

e

• elf (SimConfig)
• elf_path (SimConfig)
• ewid (simtix::BaseSM::FaultStatus)
• execution_unit_ (simtix::Instr)
• executed_ (simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore)
• entry_pc (simtix::opencl::Kernel, simtix::opencl::WorkGroup)
• execute_iq_ (simtix::pipelined::PipelinedSMImpl)
• execute_stage_ (simtix::pipelined::PipelinedSMImpl)
• expr_ (simtix::stat::Formula, simtix::stat::PostfixExpr)
• ecid (simtix::system::TaskDispatcher::CompletionInfo)
• end_time_ (tb::Testbed)

f

• fault_status_ (simtix::BaseSMImpl)
• funct3_ (simtix::Instr)
• funct7_ (simtix::Instr)
• fault_addr_ (simtix::InstrLoad, simtix::InstrStore)
• fmt_ (simtix::InstrOpFp, simtix::InstrOpFused)
• fp_exception_ (simtix::InstrOpFp, simtix::InstrOpFused)
• fp_fmt_ (simtix::InstrOpFp, simtix::InstrOpFused)
• funct5_ (simtix::InstrOpFp)
• first_stage_name_ (simtix::InstrPtr)
• flushed_ (simtix::InstrPtr)
• following_stage_ (simtix::InstrQueue)
• forwarded_requests (simtix::PipelinedArbitrator::Stat, simtix::mem::BankedMemory::Impl::Stat, simtix::mem::NBHBCacheImpl::Stat)
• flush_on_resp_ (simtix::mem::CacheImpl)
• flush_tag_arr_index_ (simtix::mem::CacheImpl)
• free_write_buffers_ (simtix::mem::CacheImpl)
• fill (simtix::mem::CacheImpl::DataArrayRequest)
• flush_addr_opt (simtix::mem::CacheImpl::DataArrayRequest)
• free_mshrs_ (simtix::mem::MshrFile)
• free_commit_buf_ids_ (simtix::pipelined::CommitStage)
• fu_array_ (simtix::pipelined::ExecuteStage)
• free_ids_ (simtix::pipelined::FetchBuf)
• fetch_pc (simtix::pipelined::InstrBuffer::InstrStream, simtix::uvm::FrontendGolden::Input)
• fifos (simtix::pipelined::InstrBuffer::InstrStream)
• fetch_filter_ (simtix::pipelined::PCGenStage)
• free_entry_ids_ (simtix::pipelined::PCGenStage)
• fetch_buf_ (simtix::pipelined::PipelinedSMImpl)
• fetch_stage_ (simtix::pipelined::PipelinedSMImpl)
• fetch_due_to_issuing (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• fetch_due_to_starving (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• fetch_filtered (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• fault_status (simtix::system::TaskDispatcher::CompletionInfo)
• flushed (simtix::trace::KonataRetireReporter::InstrRetire)
• fetch_pc_ (simtix::uvm::MockInstrBuffer)

g

• global_offset (simtix::opencl::Kernel, simtix::opencl::WorkGroup)
• global_size (simtix::opencl::Kernel, simtix::opencl::WorkGroup)

h

• has_kernel_info (SimConfig)
• has_mmap (SimConfig)
• hpmcounter3_ (simtix::Thread)
• has_pending_flush_ (simtix::mem::CacheImpl)

i

• is_write (simtix::AtomicLoadStoreUnit::Request, simtix::PipelinedArbitrator::Request, simtix::mem::CacheImpl::CoreRequest, simtix::mem::SimpleMemory::Impl::Request)
• impl_ (simtix::AtomicSM, simtix::mem::BankedMemory, simtix::mem::Cache, simtix::mem::NBHBCache, simtix::mem::SimpleMemory, simtix::mem::XBar, simtix::pipelined::PipelinedSM, simtix::system::TaskDispatcher, simtix::uvm::FrontendGolden)
• ifetch_accepted_ (simtix::AtomicSMImpl)
• ifetch_access_fault_ (simtix::AtomicSMImpl)
• ifetch_bytes_ (simtix::AtomicSMImpl)
• ifetch_payload_ (simtix::AtomicSMImpl)
• ifetch_ready_ (simtix::AtomicSMImpl)
• instr_ (simtix::AtomicSMImpl, simtix::InstrPtr)
• imem_port_ (simtix::BaseSMImpl)
• instret (simtix::BaseSMImpl::WorkGroupStat)
• ipc (simtix::BaseSMImpl::WorkGroupStat)
• is_write_ (simtix::CoalescingLoadStoreUnit)
• illegal_ (simtix::Instr)
• iword_ (simtix::Instr)
• imm_ (simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpImm, simtix::InstrStore)
• instr_count_ (simtix::InstrPtr)
• is_diverged_ (simtix::Warp)
• issue_tswid_ (simtix::Warp)
• issue_ssw_opp (simtix::WarpSched::Stat)
• is_flush (simtix::mem::CacheImpl::CoreRequest)
• is_non_cacheable (simtix::mem::CacheImpl::MemResponse)
• id (simtix::mem::MemoryInterface::Payload, simtix::opencl::WorkGroup)
• idiv_array_ (simtix::pipelined::ExecuteStage)
• imul_array_ (simtix::pipelined::ExecuteStage)
• instrs (simtix::pipelined::FetchBuf::Entry)
• is_diverged (simtix::pipelined::InstrBuffer::InstrStream)
• issuing_leader_warps_ (simtix::pipelined::PCGenStage)
• ibuffer_ (simtix::pipelined::PipelinedSMImpl)
• icache_ (simtix::pipelined::PipelinedSMImpl, simtix::system::SingleCoreSystem)
• ibuffer_stall (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• instr_filled (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• instr_flushed (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• instr_flushed_ratio (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• instr_shared (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• instr_sharing_opp (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• issue_stall (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• is_constant_ (simtix::stat::ScalarBase)
• initialized_ (simtix::system::SingleCoreSystem)
• issuing_warps (simtix::uvm::FrontendGolden::Input)
• iword (simtix::uvm::FrontendGolden::Output)

k

• ktrace_path (SimConfig)
• kThreadsPerWarp (simtix::AtomicArbitrator, simtix::PipelinedArbitrator, simtix::pipelined::PipelinedSMImpl)
• kWarpsPerCore (simtix::AtomicArbitrator, simtix::AtomicSMImpl, simtix::PipelinedArbitrator, simtix::pipelined::PipelinedSMImpl)
• kCoalescingGranularity (simtix::CoalescingLoadStoreUnit)
• kMemPorts (simtix::CoalescingLoadStoreUnit)
• kReadPorts (simtix::PipelinedArbitrator)
• kRegfileBanks (simtix::PipelinedArbitrator)
• kSharedPorts (simtix::PipelinedArbitrator)
• kSwizzle (simtix::PipelinedArbitrator)
• kWarpsPerWarpGroup (simtix::PipelinedArbitrator, simtix::pipelined::PCGenStage, simtix::pipelined::PipelinedSMImpl)
• kWritePorts (simtix::PipelinedArbitrator)
• kDefaultParam (simtix::mem::BankedMemory, simtix::mem::Cache, simtix::mem::NBHBCache, simtix::mem::SimpleMemory, simtix::pipelined::PipelinedSM)
• kBanks (simtix::mem::BankedMemory::Impl, simtix::mem::BankedMemory::Param, simtix::mem::Cache::Param, simtix::mem::CacheImpl, simtix::mem::DataArray, simtix::mem::NBHBCacheImpl, simtix::mem::TagArray)
• kInterleaveGranularity (simtix::mem::BankedMemory::Impl, simtix::mem::BankedMemory::Param)
• kLatencyCycles (simtix::mem::BankedMemory::Impl, simtix::mem::BankedMemory::Param, simtix::mem::SimpleMemory::Param)
• kOutputFifoDepth (simtix::mem::BankedMemory::Param, simtix::mem::SimpleMemory::Param)
• kSizeBytes (simtix::mem::BankedMemory::Param, simtix::mem::Cache::Param, simtix::mem::CacheImpl, simtix::mem::DataArray, simtix::mem::SimpleMemory::Param, simtix::mem::TagArray)
• kBlockSizeBytes (simtix::mem::Cache::Param, simtix::mem::CacheImpl, simtix::mem::DataArray, simtix::mem::MshrFile, simtix::mem::NBHBCacheImpl, simtix::mem::TagArray)
• kCoreReqQueueDepth (simtix::mem::Cache::Param)
• kCoreRespQueueDepth (simtix::mem::Cache::Param)
• kDataArrayReqQueueDepth (simtix::mem::Cache::Param, simtix::mem::MshrFile)
• kMSHRs (simtix::mem::Cache::Param)
• kMemRespQueueDepth (simtix::mem::Cache::Param)
• kMshrCoreReqQueueDepth (simtix::mem::Cache::Param)
• kNonCacheableQueueDepth (simtix::mem::Cache::Param)
• kNonCacheableRegions (simtix::mem::Cache::Param)
• kReplacementPolicy (simtix::mem::Cache::Param, simtix::mem::TagArray)
• kWays (simtix::mem::Cache::Param, simtix::mem::CacheImpl, simtix::mem::DataArray, simtix::mem::TagArray)
• kWriteBuffers (simtix::mem::Cache::Param)
• kWriteHitPolicy (simtix::mem::Cache::Param, simtix::mem::CacheImpl, simtix::mem::TagArray)
• kWriteMissPolicy (simtix::mem::Cache::Param, simtix::mem::CacheImpl)
• kSets (simtix::mem::DataArray, simtix::mem::TagArray)
• kernel_arg (simtix::opencl::Kernel, simtix::opencl::WorkGroup)
• kernel_id (simtix::opencl::Kernel, simtix::system::TaskDispatcher::CompletionInfo)
• kernel_pc (simtix::opencl::Kernel, simtix::opencl::WorkGroup)
• kCommitWidth (simtix::pipelined::CommitStage, simtix::pipelined::PipelinedSMImpl)
• kDecodeWidth (simtix::pipelined::DecodeStage, simtix::pipelined::PipelinedSMImpl)
• kExecuteWidth (simtix::pipelined::ExecuteStage, simtix::pipelined::PipelinedSMImpl)
• kFetchWidth (simtix::pipelined::InstrBuffer, simtix::pipelined::PCGenStage, simtix::pipelined::PipelinedSMImpl)
• kInstrStreamVariants (simtix::pipelined::InstrBuffer)
• kOperandCollectWidth (simtix::pipelined::OperandCollectStage, simtix::pipelined::PipelinedSMImpl)
• kLeaderWarps (simtix::pipelined::PCGenStage)
• kOutstandingInstrFetches (simtix::pipelined::PCGenStage)
• kScheduleWidth (simtix::pipelined::PipelinedSMImpl, simtix::pipelined::ScheduleStage)
• kDelayCycles (simtix::sim::DelayQueue)
• kernel (simtix::system::SingleCoreSystem::Config)
• kofs_ (tb::Testbed)

l

• last_status_ (simtix::AtomicSMImpl)
• lane_utilization_rate (simtix::BaseSMImpl::WorkGroupStat)
• line_buf_ (simtix::CoalescingLoadStoreUnit)
• line_addr (simtix::CoalescingLoadStoreUnit::MemRequest)
• latency_ (simtix::FixedLatencyUnit, simtix::mem::SimpleMemory::Impl)
• leader_warp_list_ (simtix::WarpSched)
• line (simtix::mem::CacheImpl::DataArrayRequest)
• local_size (simtix::opencl::Kernel, simtix::opencl::WorkGroup)
• lsu_stall (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• lmem_ (simtix::system::SingleCoreSystem)
• lmem_cfg (simtix::system::SingleCoreSystem::Config)

m

• max_ticks (SimConfig)
• mcause (simtix::BaseSM::FaultStatus)
• mepc (simtix::BaseSM::FaultStatus)
• mtval (simtix::BaseSM::FaultStatus)
• marchid_ (simtix::BaseSMImpl)
• mcycle_ (simtix::BaseSMImpl)
• minstrets_ (simtix::BaseSMImpl)
• mvendorid_ (simtix::BaseSMImpl)
• mem_req_buf_ (simtix::CoalescingLoadStoreUnit)
• mem_req_queues_ (simtix::CoalescingLoadStoreUnit)
• mnemonic_ (simtix::Instr)
• may_change_ctrl_flow_ (simtix::InstrFormosa)
• minmax_name (simtix::InstrOpFp)
• minmax_op (simtix::InstrOpFp)
• mv1_name (simtix::InstrOpFp)
• mv1_op (simtix::InstrOpFp)
• max_priority_f_level_ (simtix::Thread, simtix::Warp)
• max_priority_level_ (simtix::Thread, simtix::Warp)
• mhartid_ (simtix::Thread)
• mcause_ (simtix::Warp)
• mepc_ (simtix::Warp)
• minstret_ (simtix::Warp)
• mtval_ (simtix::Warp)
• mem_resp_queue_ (simtix::mem::CacheImpl)
• mshr_file_ (simtix::mem::CacheImpl)
• mshr_id (simtix::mem::CacheImpl::MemResponse)
• mshrs_ (simtix::mem::MshrFile)
• mem_ (simtix::mem::SimpleMemory::Impl)
• max_bandwidth_ (simtix::mem::XBar::Impl)
• m (simtix::mem::XBar::Impl::slave_t)
• mems_ (simtix::system::SingleCoreSystem)
• mmap (simtix::system::SingleCoreSystem::Config)
• mem_type (simtix::system::SingleCoreSystem::Config::Mem)
• mock_ibuffer_ (simtix::uvm::FrontendGoldenImpl)

n

• name_ (simtix::BaseSMImpl, simtix::PipelinedArbitrator, simtix::WarpSched, simtix::mem::BankedMemory::Impl, simtix::mem::CacheImpl, simtix::mem::NBHBCacheImpl, simtix::mem::SimpleMemory::Impl, simtix::mem::XBar::Impl, simtix::sim::Clocked, simtix::stat::Group, simtix::stat::StatBase)
• num_active_warps_ (simtix::BaseSMImpl)
• num_threads_per_warp_ (simtix::BaseSMImpl)
• num_warps_ (simtix::BaseSMImpl, simtix::WarpSched)
• num_warps_per_warpgroup_ (simtix::BaseSMImpl, simtix::Warp, simtix::WarpSched)
• next_pc_ (simtix::InstrBranch, simtix::InstrJal, simtix::InstrJalr)
• num_pending_load_ (simtix::InstrLoad)
• num_pending_store_ (simtix::InstrStore)
• num_active_tsws_ (simtix::Warp)
• num_pending_commits_ (simtix::Warp)
• num_threads_ (simtix::Warp)
• num_valid_threads_ (simtix::Warp)
• next_level_ (simtix::mem::CacheImpl, simtix::mem::NBHBCacheImpl)
• non_cacheable_mem_req_queue_ (simtix::mem::CacheImpl)
• non_cacheable_regions_ (simtix::mem::CacheImpl)
• next_pc (simtix::pipelined::InstrBuffer::InstrStream)
• num_fetch (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• num_instr_per_lane (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)

o

• outstanding_requests_ (simtix::AtomicLoadStoreUnit)
• on_resp (simtix::AtomicLoadStoreUnit::Request, simtix::CoalescingLoadStoreUnit::CoreRequest, simtix::mem::CacheImpl::CoreRequest, simtix::mem::SimpleMemory::Impl::Request)
• opcode_ (simtix::Instr)
• op_ (simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem)
• op32_ (simtix::InstrOp32, simtix::InstrOpImm32)
• on_ready (simtix::PipelinedArbitrator::Request)
• operand_collect_stage_ (simtix::pipelined::PipelinedSMImpl)
• operandcollect_iq_ (simtix::pipelined::PipelinedSMImpl)
• os_ (simtix::trace::KonataTracer, simtix::trace::OstreamTracer)

p

• print_mem (SimConfig)
• print_mem_out (SimConfig)
• param_ (simtix::ArchParamBuilder, simtix::pipelined::PipelinedSM::ParamBuilder)
• payload (simtix::AtomicLoadStoreUnit::Request, simtix::CoalescingLoadStoreUnit::CoreRequest, simtix::mem::CacheImpl::CoreRequest, simtix::mem::CacheImpl::WriteBufferEntry, simtix::mem::MshrFile::MSHR, simtix::mem::SimpleMemory::Impl::Request)
• pending_instrs_ (simtix::CoalescingLoadStoreUnit)
• pc_ (simtix::InstrAuipc, simtix::Thread)
• pool_ (simtix::InstrPool, simtix::InstrPtr)
• prioritized_leader_wid_ (simtix::RRWarpSched, simtix::pipelined::PCGenStage)
• prioritized_sswid_list_ (simtix::RRWarpSched)
• priority_ (simtix::Thread)
• priority_f_ (simtix::Thread)
• pc_busy_ (simtix::Warp)
• pending_write_req_queue_ (simtix::mem::CacheImpl)
• pending_mshr_replay_queue_ (simtix::mem::MshrFile)
• pending_mshr_req_queue_ (simtix::mem::MshrFile)
• pending_commit_buf_ids_ (simtix::pipelined::CommitStage)
• prioritized_fu_id_ (simtix::pipelined::ExecuteStage)
• pending_req_ids_ (simtix::pipelined::FetchBuf)
• pending_resp_ids_ (simtix::pipelined::FetchBuf)
• pc_gen_stage_ (simtix::pipelined::PipelinedSMImpl)
• pipelined_arbitrator_ (simtix::pipelined::PipelinedSMImpl)
• pri_ (simtix::sim::Clocked)
• parent_ (simtix::stat::StatBase)
• pipelined_param (simtix::system::SingleCoreSystem::Config)
• pipelined_param_builder (simtix::system::SingleCoreSystem::Config)
• pending_completion_info_ (simtix::system::TaskDispatcherImpl)
• pending_wg_ (simtix::system::TaskDispatcherImpl)

r

• regfile_ (simtix::AtomicArbitrator, simtix::PipelinedArbitrator)
• requesting_ (simtix::AtomicLoadStoreUnit)
• response_instrs_ (simtix::CoalescingLoadStoreUnit)
• ready (simtix::CoalescingLoadStoreUnit::CoreRequest, simtix::pipelined::FetchBuf::Entry)
• rd_ (simtix::Instr)
• rs1_ (simtix::Instr)
• rs2_ (simtix::Instr)
• rd_data_ (simtix::InstrAuipc, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrSystem)
• rs1_data_ (simtix::InstrBranch, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem)
• rs1_data_ready_ (simtix::InstrBranch, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem)
• rs2_data_ (simtix::InstrBranch, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrStore)
• rs2_data_ready_ (simtix::InstrBranch, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrStore)
• rm_ (simtix::InstrOpFp, simtix::InstrOpFused)
• rs3_ (simtix::InstrOpFused)
• rs3_data_ (simtix::InstrOpFused)
• rs3_data_ready_ (simtix::InstrOpFused)
• read_bank_mask_ (simtix::PipelinedArbitrator)
• read_req_buf_ (simtix::PipelinedArbitrator)
• req_buf_ (simtix::PipelinedArbitrator)
• req_buf_arr_ (simtix::PipelinedArbitrator)
• reg_id (simtix::PipelinedArbitrator::Request)
• req_bank (simtix::PipelinedArbitrator::Request)
• reg_busy_ (simtix::Warp)
• rtv_ (simtix::Warp)
• resp_status (simtix::mem::CacheImpl::CoreRequest, simtix::mem::CacheImpl::MemResponse, simtix::mem::SimpleMemory::Impl::Request)
• read_hit (simtix::mem::CacheImpl::Stat)
• read_hit_ratio (simtix::mem::CacheImpl::Stat)
• read_inter_warp_hit (simtix::mem::CacheImpl::Stat)
• read_intra_warp_hit (simtix::mem::CacheImpl::Stat)
• read_miss (simtix::mem::CacheImpl::Stat)
• read_request (simtix::mem::CacheImpl::Stat)
• req_queue_ (simtix::mem::SimpleMemory::Impl)
• resp_queue_ (simtix::mem::SimpleMemory::Impl)
• running_kernel_ (simtix::system::TaskDispatcherImpl)
• retire_list_ (simtix::trace::KonataRetireReporter)
• retire_id (simtix::trace::KonataRetireReporter::InstrRetire)

s

• size (MemConfig, simtix::mem::Cache::Param::NonCacheableEntry, simtix::mem::MemoryInterface::Payload, simtix::system::SingleCoreSystem::Config::Mem)
• stat_path (SimConfig)
• sys_cfg (SimConfig)
• stat_ (simtix::AtomicSMImpl, simtix::PipelinedArbitrator, simtix::WarpSched, simtix::mem::BankedMemory::Impl, simtix::mem::CacheImpl, simtix::mem::NBHBCacheImpl, simtix::pipelined::PipelinedSMImpl, simtix::system::SingleCoreSystem, tb::Testbed)
• scheduler_ (simtix::BaseSMImpl)
• status_ (simtix::BaseSMImpl, simtix::Warp, simtix::system::TaskDispatcherImpl)
• strb_buf_ (simtix::CoalescingLoadStoreUnit)
• ssw_ (simtix::Instr, simtix::InstrPtr)
• set_priority_ (simtix::InstrFormosa)
• sgnj_name (simtix::InstrOpFp, simtix::InstrOpFused)
• sgnj_op (simtix::InstrOpFp, simtix::InstrOpFused)
• selected_leader_ssw_ (simtix::RRWarpSched)
• selected_leader_wid_ (simtix::RRWarpSched)
• sm_ (simtix::Warp, simtix::pipelined::CommitStage, simtix::pipelined::DecodeStage, simtix::pipelined::ExecuteStage, simtix::pipelined::FetchStage, simtix::pipelined::InstrBuffer, simtix::pipelined::OperandCollectStage, simtix::pipelined::PCGenStage, simtix::pipelined::ScheduleStage, simtix::system::SingleCoreSystem)
• sswpc_ (simtix::Warp)
• status (simtix::mem::CacheImpl::DataArrayRequest, simtix::system::TaskDispatcher::CompletionInfo)
• strb_buf (simtix::mem::CacheImpl::WriteBufferEntry)
• strb (simtix::mem::MemoryInterface::Payload)
• size_ (simtix::mem::SimpleMemory::Impl)
• slaves_ (simtix::mem::XBar::Impl)
• starving_leader_warps_ (simtix::pipelined::PCGenStage)
• schedule_iq_ (simtix::pipelined::PipelinedSMImpl)
• schedule_stage_ (simtix::pipelined::PipelinedSMImpl)
• storage_ (simtix::stat::Scalar, simtix::stat::Vector)
• sum_ (simtix::stat::Vector)
• simple_param (simtix::system::SingleCoreSystem::Config::Mem)
• sm_type (simtix::system::SingleCoreSystem::Config)
• sm_list_ (simtix::system::TaskDispatcherImpl)
• starving_warps (simtix::uvm::FrontendGolden::Input)
• start_time_ (tb::Testbed)
• system_ (tb::Testbed)
• sim_freq (tb::Testbed::TestbedStat)
• sim_ticks (tb::Testbed::TestbedStat)
• sim_time (tb::Testbed::TestbedStat)

t

• total_active_lanes (simtix::BaseSMImpl::WorkGroupStat)
• total_arithmetic_instr (simtix::BaseSMImpl::WorkGroupStat)
• total_branch_instr (simtix::BaseSMImpl::WorkGroupStat)
• total_custom_instr (simtix::BaseSMImpl::WorkGroupStat)
• total_fp_instr (simtix::BaseSMImpl::WorkGroupStat)
• total_instret (simtix::BaseSMImpl::WorkGroupStat)
• total_issue_lanes (simtix::BaseSMImpl::WorkGroupStat)
• total_jump_instr (simtix::BaseSMImpl::WorkGroupStat)
• total_load_instr (simtix::BaseSMImpl::WorkGroupStat)
• total_store_instr (simtix::BaseSMImpl::WorkGroupStat)
• total_system_instr (simtix::BaseSMImpl::WorkGroupStat)
• tswid_ (simtix::Instr)
• total_read_requests (simtix::PipelinedArbitrator::Stat, simtix::mem::BankedMemory::Impl::Stat, simtix::mem::NBHBCacheImpl::Stat)
• total_requests (simtix::PipelinedArbitrator::Stat, simtix::mem::BankedMemory::Impl::Stat, simtix::mem::NBHBCacheImpl::Stat)
• total_write_requests (simtix::PipelinedArbitrator::Stat, simtix::mem::BankedMemory::Impl::Stat, simtix::mem::NBHBCacheImpl::Stat)
• tid_ (simtix::Thread)
• threads_ (simtix::Warp)
• tsw_commit_mask_ (simtix::Warp)
• timestamp (simtix::mem::CacheImpl::CoreRequest, simtix::mem::CacheImpl::WriteBufferEntry, simtix::mem::TagArray::Tag)
• total_hit (simtix::mem::CacheImpl::Stat)
• total_hit_ratio (simtix::mem::CacheImpl::Stat)
• total_miss (simtix::mem::CacheImpl::Stat)
• total_request (simtix::mem::CacheImpl::Stat)
• tag_array_ (simtix::mem::CacheImpl)
• tag (simtix::mem::TagArray::Tag)
• tsw_num_freq (simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• tick_executed (simtix::system::SingleCoreSystem::SingleCoreSystemStat)
• td_ (simtix::system::SingleCoreSystem)
• test_q_ (simtix::uvm::FrontendGoldenImpl)

u

• unique_id_ (simtix::InstrPtr)
• uimm_ (simtix::InstrSystem)
• upper (simtix::mem::XBar::Impl::slave_t)
• unit_ (simtix::stat::StatBase)
• unique_id (simtix::trace::KonataRetireReporter::InstrRetire)

v

• valid (simtix::AtomicLoadStoreUnit::Request, simtix::CoalescingLoadStoreUnit::CoreRequest, simtix::mem::MshrFile::MSHR, simtix::mem::TagArray::Tag, simtix::pipelined::InstrBuffer::InstrStream, simtix::pipelined::PCGenStage::FetchFilterEntry)
• valid_leader_warps_ (simtix::BaseSMImpl)
• victim (simtix::mem::CacheImpl::DataArrayRequest, simtix::mem::TagArray::Rep)
• vector_ (simtix::stat::Vector::Reduction)

w

• wg_stat_ (simtix::AtomicSMImpl, simtix::pipelined::PipelinedSMImpl)
• wc (simtix::BaseSMImpl::Barrier)
• warps_ (simtix::BaseSMImpl)
• wg_completion_barrier_ (simtix::BaseSMImpl)
• wg_serial_id_ (simtix::BaseSMImpl)
• wid_ (simtix::CoalescingLoadStoreUnit, simtix::Warp)
• warp_ (simtix::Instr, simtix::InstrPtr, simtix::Thread)
• wpc_ (simtix::Instr, simtix::InstrPtr, simtix::Warp)
• write_bank_mask_ (simtix::PipelinedArbitrator)
• write_req_buf_ (simtix::PipelinedArbitrator)
• wc_ (simtix::Warp)
• warp_sched_stall (simtix::WarpSched::Stat)
• way (simtix::mem::CacheImpl::DataArrayRequest, simtix::mem::TagArray::Rep)
• wid (simtix::mem::CacheImpl::MemResponse, simtix::mem::MemoryInterface::Payload, simtix::mem::TagArray::Tag, simtix::uvm::FrontendGolden::Output)
• write_hit (simtix::mem::CacheImpl::Stat)
• write_hit_ratio (simtix::mem::CacheImpl::Stat)
• write_inter_warp_hit (simtix::mem::CacheImpl::Stat)
• write_intra_warp_hit (simtix::mem::CacheImpl::Stat)
• write_miss (simtix::mem::CacheImpl::Stat)
• write_request (simtix::mem::CacheImpl::Stat)
• write_buffers_ (simtix::mem::CacheImpl)
• warp_lists_ (simtix::pipelined::PCGenStage)
• wpc (simtix::uvm::FrontendGolden::Output)

x

• xclgoffx_ (simtix::BaseSMImpl)
• xclgoffy_ (simtix::BaseSMImpl)
• xclgoffz_ (simtix::BaseSMImpl)
• xclgsx_ (simtix::BaseSMImpl)
• xclgsy_ (simtix::BaseSMImpl)
• xclgsz_ (simtix::BaseSMImpl)
• xclsx_ (simtix::BaseSMImpl)
• xclsy_ (simtix::BaseSMImpl)
• xclsz_ (simtix::BaseSMImpl)
• xclwx_ (simtix::BaseSMImpl)
• xclwy_ (simtix::BaseSMImpl)
• xclwz_ (simtix::BaseSMImpl)
• xdim_ (simtix::BaseSMImpl)
• xkernelarg_ (simtix::BaseSMImpl)
• xkernelpc_ (simtix::BaseSMImpl)
• xmhartidbase_ (simtix::BaseSMImpl)
• xcllx_ (simtix::Thread)
• xclly_ (simtix::Thread)
• xcllz_ (simtix::Thread)
• xbar_bw (simtix::system::SingleCoreSystem::Config)
• xbar_ (simtix::system::SingleCoreSystem)

@

• @2 (simtix::system::SingleCoreSystem::Config::Mem)