Class Member Functions

a

• ArchParam (simtix::ArchParam)
• ArchParamBuilder (simtix::ArchParamBuilder)
• AtomicArbitrator (simtix::AtomicArbitrator)
• AtomicLoadStoreUnit (simtix::AtomicLoadStoreUnit)
• AtomicSM (simtix::AtomicSM)
• AttachDMem (simtix::AtomicSM, simtix::BaseLoadStoreUnit, simtix::BaseSM, simtix::BaseSMImpl, simtix::pipelined::PipelinedSM, simtix::pipelined::PipelinedSMImpl)
• AttachIMem (simtix::AtomicSM, simtix::BaseSM, simtix::BaseSMImpl, simtix::pipelined::PipelinedSM, simtix::pipelined::PipelinedSMImpl, simtix::uvm::FrontendGolden)
• AtomicSMImpl (simtix::AtomicSMImpl)
• arbitrator (simtix::AtomicSMImpl, simtix::BaseSMImpl, simtix::Warp, simtix::pipelined::PipelinedSMImpl)
• AcceptCoreRequests (simtix::CoalescingLoadStoreUnit)
• Assign (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOp32, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrOpImm32, simtix::InstrStore, simtix::InstrSystem)
• auipc_ (simtix::InstrAuipc)
• add_ (simtix::InstrOp)
• and_ (simtix::InstrOp)
• addw_ (simtix::InstrOp32)
• addi_ (simtix::InstrOpImm)
• andi_ (simtix::InstrOpImm)
• addiw_ (simtix::InstrOpImm32)
• Allocate (simtix::InstrPool, simtix::InstrPoolInterface, simtix::pipelined::FetchBuf)
• AddKonataLabel (simtix::InstrPtr)
• AccessRegfile (simtix::PipelinedArbitrator)
• ArbitrateReq (simtix::PipelinedArbitrator)
• AdvancePC (simtix::Thread)
• ActiveThreadMaskPattern (simtix::Warp)
• ArbitratePC (simtix::Warp)
• active_thread_mask (simtix::Warp)
• active_threads (simtix::Warp)
• AttachNextLevel (simtix::mem::Cache, simtix::mem::CacheInterface, simtix::mem::NBHBCache)
• AcceptCoreRequest (simtix::mem::CacheImpl, simtix::mem::MshrFile)
• AcceptMemResponse (simtix::mem::CacheImpl)
• AccessDataArray (simtix::mem::CacheImpl)
• AccessTagArray (simtix::mem::CacheImpl)
• AcceptRequest (simtix::mem::SimpleMemory::Impl, simtix::mem::XBar::Impl)
• AddSlave (simtix::mem::XBar, simtix::mem::XBar::Impl)
• AcceptPendingCommitRequests (simtix::pipelined::CommitStage)
• AcceptPendingCollectReqeusts (simtix::pipelined::OperandCollectStage)
• AttachDCache (simtix::pipelined::PipelinedSM)
• AttachICache (simtix::pipelined::PipelinedSM)
• AddStat (simtix::stat::Group)
• AddStatGroup (simtix::stat::Group)
• average (simtix::stat::Vector)
• Average (simtix::stat::Vector::Average)
• AttachSM (simtix::system::TaskDispatcher)

b

• Build (simtix::ArchParam, simtix::pipelined::PipelinedSM::Param)
• Busy (simtix::AtomicLoadStoreUnit, simtix::BaseFunctionUnit, simtix::CoalescingLoadStoreUnit, simtix::FixedLatencyUnit)
• BaseLoadStoreUnit (simtix::BaseLoadStoreUnit)
• BaseSM (simtix::BaseSM)
• BarrierCompleted (simtix::BaseSMImpl)
• BaseSMImpl (simtix::BaseSMImpl)
• BitMask (simtix::Instr)
• barrier_valid (simtix::Instr, simtix::InstrFormosa)
• beq_ (simtix::InstrBranch)
• bge_ (simtix::InstrBranch)
• bgeu_ (simtix::InstrBranch)
• blt_ (simtix::InstrBranch)
• bltu_ (simtix::InstrBranch)
• bne_ (simtix::InstrBranch)
• bid (simtix::Warp)
• BankedMemory (simtix::mem::BankedMemory)
• BaseSystem (simtix::system::BaseSystem)

c

• cores_per_system (simtix::ArchParamBuilder)
• cid (simtix::AtomicSM, simtix::BaseSM, simtix::pipelined::PipelinedSM)
• Coalesce (simtix::CoalescingLoadStoreUnit)
• CoalescingLoadStoreUnit (simtix::CoalescingLoadStoreUnit)
• CanCommit (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem, simtix::InstrTrap)
• CanExecute (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem, simtix::InstrTrap)
• CanIssue (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem, simtix::InstrTrap)
• CanRetire (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem, simtix::InstrTrap)
• Commit (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem, simtix::InstrTrap, simtix::pipelined::CommitStage)
• czero_eqz_ (simtix::InstrOp)
• czero_nez_ (simtix::InstrOp)
• csrrc_ (simtix::InstrSystem)
• csrrci_ (simtix::InstrSystem)
• csrrs_ (simtix::InstrSystem)
• csrrsi_ (simtix::InstrSystem)
• csrrw_ (simtix::InstrSystem)
• csrrwi_ (simtix::InstrSystem)
• CompactActiveThreads (simtix::Warp)
• ComputeRTV (simtix::Warp)
• Cache (simtix::mem::Cache)
• CacheImpl (simtix::mem::CacheImpl)
• CanServeMshrReqFirst (simtix::mem::CacheImpl)
• CoreRequest (simtix::mem::CacheImpl::CoreRequest)
• CacheInterface (simtix::mem::CacheInterface)
• CanAcceptCoreRequest (simtix::mem::MshrFile)
• CanAcceptCoreRequestEarly (simtix::mem::MshrFile)
• CheckIfMshrHit (simtix::mem::MshrFile)
• CommitStage (simtix::pipelined::CommitStage)
• CollectFinishedInstr (simtix::pipelined::ExecuteStage)
• CanEnq (simtix::pipelined::InstrBuffer)
• CanEnqInstrToStream (simtix::pipelined::InstrBuffer)
• capacious (simtix::pipelined::InstrBuffer, simtix::uvm::MockInstrBuffer)
• capacity (simtix::pipelined::InstrBuffer, simtix::sim::SizedQueue)
• coalescing_granularity (simtix::pipelined::PipelinedSM::ParamBuilder)
• commit_buffer_size (simtix::pipelined::PipelinedSM::ParamBuilder)
• commit_width (simtix::pipelined::PipelinedSM::ParamBuilder)
• ClearInstrQueue (simtix::pipelined::PipelinedSMImpl)
• Clocked (simtix::sim::Clocked)
• CanDeq (simtix::sim::GenericDelayQueue)

d

• DECL_PARAM_W_GETTER (simtix::ArchParam, simtix::pipelined::PipelinedSM::Param)
• Decode (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOp32, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrOpImm32, simtix::InstrStore, simtix::InstrSystem, simtix::InstrTrap, simtix::pipelined::DecodeStage)
• DecodeFunct3 (simtix::Instr)
• DecodeFunct7 (simtix::Instr)
• DecodeOpcode (simtix::Instr)
• DecodeRd (simtix::Instr)
• DecodeRs1 (simtix::Instr)
• DecodeRs2 (simtix::Instr)
• DecodeImmItype (simtix::InstrAuipc, simtix::InstrJalr, simtix::InstrLui, simtix::InstrOpImm)
• DecodePC (simtix::InstrAuipc)
• DecodeImmBtype (simtix::InstrBranch)
• DecodeImmJtype (simtix::InstrJal)
• div_ (simtix::InstrOp)
• divu_ (simtix::InstrOp)
• divuw_ (simtix::InstrOp32)
• divw_ (simtix::InstrOp32)
• DuplicateForWarp (simtix::InstrPtr)
• Deq (simtix::InstrQueue, simtix::pipelined::InstrBuffer, simtix::sim::GenericDelayQueue, simtix::sim::SizedQueue)
• DecodeImmStype (simtix::InstrStore)
• DecodeCSR (simtix::InstrSystem)
• DecodeUimm (simtix::InstrSystem)
• DataArrayRequest (simtix::mem::CacheImpl::DataArrayRequest)
• DataArray (simtix::mem::DataArray)
• DecodeStage (simtix::pipelined::DecodeStage)
• DispatchPendingInstr (simtix::pipelined::ExecuteStage)
• Disable (simtix::pipelined::InstrBuffer)
• dcache_param (simtix::pipelined::PipelinedSM::ParamBuilder)
• decode_width (simtix::pipelined::PipelinedSM::ParamBuilder)
• DelayQueue (simtix::sim::DelayQueue)
• delay (simtix::sim::DelayQueue)
• desc (simtix::stat::StatBase)
• data (simtix::stat::Vector)
• Dump (simtix::trace::KonataTracer)
• DumpTrace (simtix::trace::OstreamTracer)
• DumpTraceFlag (simtix::trace::OstreamTracer)
• DumpMem (tb::Testbed)

e

• Execute (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOp32, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrOpImm32, simtix::InstrStore, simtix::InstrSystem, simtix::InstrTrap, simtix::pipelined::ExecuteStage)
• exception_valid (simtix::Instr, simtix::InstrLoad, simtix::InstrStore, simtix::InstrSystem, simtix::InstrTrap)
• execution_unit (simtix::Instr)
• ecall_ (simtix::InstrSystem)
• ExecuteStage (simtix::pipelined::ExecuteStage)
• empty (simtix::pipelined::FetchBuf, simtix::pipelined::InstrBuffer, simtix::uvm::MockInstrBuffer)
• Entry (simtix::pipelined::FetchBuf::Entry)
• Enable (simtix::pipelined::InstrBuffer)
• Enq (simtix::pipelined::InstrBuffer, simtix::sim::DelayQueue, simtix::sim::GenericDelayQueue, simtix::sim::SizedQueue)
• EnqInstrToStream (simtix::pipelined::InstrBuffer)
• ExecuteOperandCollectedRequests (simtix::pipelined::OperandCollectStage)
• execute_width (simtix::pipelined::PipelinedSM::ParamBuilder)
• Evaluate (simtix::stat::PostfixExpr)

f

• format (fmt::formatter< simtix::ArchParam::WarpSchedPolicies >, fmt::formatter< simtix::BaseSM::Status >, fmt::formatter< simtix::SMType >, fmt::formatter< simtix::mem::Cache::Param::ReplacementPolicies >, fmt::formatter< simtix::mem::Cache::Param::WriteHitPolicies >, fmt::formatter< simtix::mem::Cache::Param::WriteMissPolicies >, fmt::formatter< simtix::mem::MemType >, fmt::formatter< simtix::stat::Operation >, fmt::formatter< simtix::system::TaskDispatcher::CompletionInfo::Status >, fmt::formatter< simtix::system::TaskDispatcher::Status >)
• fault_status (simtix::AtomicSM, simtix::BaseSM, simtix::pipelined::PipelinedSM)
• FixedLatencyUnit (simtix::FixedLatencyUnit)
• fsa_bar_ (simtix::InstrFormosa)
• fsa_pri_lower_ (simtix::InstrFormosa)
• fsa_pri_lower_f_ (simtix::InstrFormosa)
• fsa_pri_raise_ (simtix::InstrFormosa)
• fsa_pri_raise_f_ (simtix::InstrFormosa)
• fsa_pri_reset_ (simtix::InstrFormosa)
• fsa_pri_set_ (simtix::InstrFormosa)
• fadd_d_ (simtix::InstrOpFp)
• fadd_s_ (simtix::InstrOpFp)
• fclass_d_ (simtix::InstrOpFp)
• fclass_s_ (simtix::InstrOpFp)
• fcmp_eq_d_ (simtix::InstrOpFp)
• fcmp_eq_s_ (simtix::InstrOpFp)
• fcmp_le_d_ (simtix::InstrOpFp)
• fcmp_le_s_ (simtix::InstrOpFp)
• fcmp_lt_d_ (simtix::InstrOpFp)
• fcmp_lt_s_ (simtix::InstrOpFp)
• fcvt_d_l_ (simtix::InstrOpFp)
• fcvt_d_lu_ (simtix::InstrOpFp)
• fcvt_d_s_ (simtix::InstrOpFp)
• fcvt_d_w_ (simtix::InstrOpFp)
• fcvt_d_wu_ (simtix::InstrOpFp)
• fcvt_l_d_ (simtix::InstrOpFp)
• fcvt_l_s_ (simtix::InstrOpFp)
• fcvt_lu_d_ (simtix::InstrOpFp)
• fcvt_lu_s_ (simtix::InstrOpFp)
• fcvt_s_d_ (simtix::InstrOpFp)
• fcvt_s_l_ (simtix::InstrOpFp)
• fcvt_s_lu_ (simtix::InstrOpFp)
• fcvt_s_w_ (simtix::InstrOpFp)
• fcvt_s_wu_ (simtix::InstrOpFp)
• fcvt_w_d_ (simtix::InstrOpFp)
• fcvt_w_s_ (simtix::InstrOpFp)
• fcvt_wu_d_ (simtix::InstrOpFp)
• fcvt_wu_s_ (simtix::InstrOpFp)
• fdiv_d_ (simtix::InstrOpFp)
• fdiv_s_ (simtix::InstrOpFp)
• fmax_d_ (simtix::InstrOpFp)
• fmax_s_ (simtix::InstrOpFp)
• fmin_d_ (simtix::InstrOpFp)
• fmin_s_ (simtix::InstrOpFp)
• fmul_d_ (simtix::InstrOpFp)
• fmul_s_ (simtix::InstrOpFp)
• fmv_d_x_ (simtix::InstrOpFp)
• fmv_w_x_ (simtix::InstrOpFp)
• fmv_x_d_ (simtix::InstrOpFp)
• fmv_x_w_ (simtix::InstrOpFp)
• fsgnj_d_ (simtix::InstrOpFp)
• fsgnj_n_d_ (simtix::InstrOpFp)
• fsgnj_n_s_ (simtix::InstrOpFp)
• fsgnj_s_ (simtix::InstrOpFp)
• fsgnj_x_d_ (simtix::InstrOpFp)
• fsgnj_x_s_ (simtix::InstrOpFp)
• fsqrt_d_ (simtix::InstrOpFp)
• fsqrt_s_ (simtix::InstrOpFp)
• fsub_d_ (simtix::InstrOpFp)
• fsub_s_ (simtix::InstrOpFp)
• fmadd_d_ (simtix::InstrOpFused)
• fmadd_s_ (simtix::InstrOpFused)
• fmsub_d_ (simtix::InstrOpFused)
• fmsub_s_ (simtix::InstrOpFused)
• fnmadd_d_ (simtix::InstrOpFused)
• fnmadd_s_ (simtix::InstrOpFused)
• fnmsub_d_ (simtix::InstrOpFused)
• fnmsub_s_ (simtix::InstrOpFused)
• Flush (simtix::InstrQueue, simtix::mem::Cache, simtix::mem::CacheInterface, simtix::mem::NBHBCache, simtix::trace::KonataRetireReporter)
• ForwardRequest (simtix::mem::BankedMemory::Impl, simtix::mem::NBHBCacheImpl)
• FindDirtyTag (simtix::mem::TagArray)
• FetchBuf (simtix::pipelined::FetchBuf)
• full (simtix::pipelined::FetchBuf, simtix::pipelined::InstrBuffer, simtix::sim::SizedQueue)
• Fetch (simtix::pipelined::FetchStage)
• FetchStage (simtix::pipelined::FetchStage)
• FlushFIFO (simtix::pipelined::InstrBuffer)
• ForEachValidInstrStream (simtix::pipelined::InstrBuffer)
• fetch_pc (simtix::pipelined::InstrBuffer, simtix::uvm::MockInstrBuffer)
• front (simtix::pipelined::InstrBuffer)
• fetch_width (simtix::pipelined::PipelinedSM::ParamBuilder)
• FcfsDelayQueue (simtix::sim::FcfsDelayQueue)
• Formula (simtix::stat::Formula)
• flush_ (simtix::trace::KonataRetireReporter)
• FrontendGolden (simtix::uvm::FrontendGolden)
• FrontendGoldenImpl (simtix::uvm::FrontendGoldenImpl)

g

• Get (simtix::AtomicLoadStoreUnit, simtix::BaseFunctionUnit, simtix::CoalescingLoadStoreUnit, simtix::FixedLatencyUnit, simtix::uvm::FrontendGolden)
• GetLineBuffer (simtix::CoalescingLoadStoreUnit)
• GetStrbBuffer (simtix::CoalescingLoadStoreUnit)
• Gto (simtix::Gto)
• GetInstance (simtix::InstrPool, simtix::trace::KonataRetireReporter, simtix::trace::KonataTracer, simtix::trace::OstreamTracer)
• GetWay (simtix::mem::DataArray)
• GetMshrCoreReqQueueFront (simtix::mem::MshrFile)
• GetMshrDataBuffer (simtix::mem::MshrFile)
• GetMshrPayload (simtix::mem::MshrFile)
• GetPendingReplayRequest (simtix::mem::MshrFile)
• GetSet (simtix::mem::TagArray)
• GetPendingFetchReq (simtix::pipelined::FetchBuf)
• GetPendingFetchResp (simtix::pipelined::FetchBuf)
• GenerateFetchRequest (simtix::pipelined::PCGenStage)
• GenericDelayQueue (simtix::sim::GenericDelayQueue)
• Group (simtix::stat::Group)
• GetCompletionInfo (simtix::system::TaskDispatcher)
• GetInstanceImpl (simtix::trace::KonataTracer, simtix::trace::OstreamTracer)

h

• HasPendingTasks (simtix::AtomicLoadStoreUnit, simtix::AtomicSM, simtix::CoalescingLoadStoreUnit, simtix::mem::BankedMemory, simtix::mem::Cache, simtix::mem::NBHBCache, simtix::mem::SimpleMemory, simtix::mem::XBar, simtix::pipelined::PipelinedSM, simtix::sim::Clocked, simtix::sim::GenericDelayQueue, simtix::system::TaskDispatcher, simtix::trace::KonataRetireReporter, simtix::uvm::FrontendGolden)
• HandleReadRequests (simtix::CoalescingLoadStoreUnit)
• HandleWriteRequests (simtix::CoalescingLoadStoreUnit)
• has_fatal_exception (simtix::InstrOpFp, simtix::InstrOpFused)
• HasPendingCommit (simtix::Warp)
• HasUnissuedTSW (simtix::Warp)
• HasUnresolvedBranch (simtix::Warp)
• HandleCoreResponse (simtix::mem::CacheImpl)
• HandleMemRequest (simtix::mem::CacheImpl)
• HasFreeMshr (simtix::mem::MshrFile)
• HasFreeMshrEarly (simtix::mem::MshrFile)
• HasPendingMshr (simtix::mem::MshrFile)
• HasPendingReplayRequest (simtix::mem::MshrFile)
• HandleDelay (simtix::mem::SimpleMemory::Impl)
• HandleReadWrite (simtix::mem::SimpleMemory::Impl)
• HandleRequest (simtix::mem::SimpleMemory::Impl)
• HandleResponse (simtix::mem::SimpleMemory::Impl)

i

• Impl (simtix::AtomicSM::Impl, simtix::mem::BankedMemory::Impl, simtix::mem::Cache::Impl, simtix::mem::NBHBCache::Impl, simtix::mem::SimpleMemory::Impl, simtix::mem::XBar::Impl, simtix::pipelined::PipelinedSM::Impl, simtix::uvm::FrontendGolden::Impl)
• IsBusy (simtix::BaseSMImpl)
• Instr (simtix::Instr)
• Issue (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrSystem, simtix::InstrTrap)
• illegal (simtix::Instr)
• iword (simtix::Instr)
• InstrAuipc (simtix::InstrAuipc)
• InstrBranch (simtix::InstrBranch)
• InstrFormosa (simtix::InstrFormosa)
• InstrJal (simtix::InstrJal)
• InstrJalr (simtix::InstrJalr)
• InstrLoad (simtix::InstrLoad)
• InstrLui (simtix::InstrLui)
• InstrOp (simtix::InstrOp)
• InstrOp32 (simtix::InstrOp32)
• InstrOpFp (simtix::InstrOpFp)
• InstrOpFused (simtix::InstrOpFused)
• InstrOpImm (simtix::InstrOpImm)
• InstrOpImm32 (simtix::InstrOpImm32)
• InstrPool (simtix::InstrPool)
• Instantiate (simtix::InstrPtr)
• InstrPtr (simtix::InstrPtr)
• instr (simtix::InstrPtr)
• InstrQueue (simtix::InstrQueue)
• InstrStore (simtix::InstrStore)
• InstrSystem (simtix::InstrSystem)
• InstrTrap (simtix::InstrTrap)
• Initialize (simtix::Warp, simtix::system::BaseSystem, simtix::system::SingleCoreSystem, tb::Testbed)
• is_diverged (simtix::Warp, simtix::pipelined::InstrBuffer)
• is_last_tsw (simtix::Warp)
• issue_tswid (simtix::Warp)
• IsNonCacheablePayload (simtix::mem::CacheImpl)
• IsOutOfBound (simtix::mem::DataArray)
• IssuePendingFetchRequests (simtix::pipelined::FetchStage)
• InstrBuffer (simtix::pipelined::InstrBuffer)
• InstrStream (simtix::pipelined::InstrBuffer::InstrStream)
• ialu_latency (simtix::pipelined::PipelinedSM::ParamBuilder)
• icache_param (simtix::pipelined::PipelinedSM::ParamBuilder)
• idiv_latency (simtix::pipelined::PipelinedSM::ParamBuilder)
• imul_latency (simtix::pipelined::PipelinedSM::ParamBuilder)
• instr_buffer_capacity (simtix::pipelined::PipelinedSM::ParamBuilder)
• instr_queue_capacity (simtix::pipelined::PipelinedSM::ParamBuilder)
• is_constant (simtix::stat::ScalarBase)
• initialized (simtix::system::SingleCoreSystem)
• Init (simtix::trace::KonataTracer, simtix::trace::OstreamTracer)
• Input (simtix::uvm::FrontendGolden::Input)

j

• jal_ (simtix::InstrJal)
• jalr_ (simtix::InstrJalr)

k

• KonataRetireReporter (simtix::trace::KonataRetireReporter)
• KonataTracer (simtix::trace::KonataTracer)

l

• lsu (simtix::AtomicSMImpl, simtix::BaseSMImpl, simtix::Warp, simtix::pipelined::PipelinedSMImpl)
• lb_ (simtix::InstrLoad)
• lbu_ (simtix::InstrLoad)
• ld_ (simtix::InstrLoad)
• lh_ (simtix::InstrLoad)
• lhu_ (simtix::InstrLoad)
• lw_ (simtix::InstrLoad)
• lwu_ (simtix::InstrLoad)
• lui_ (simtix::InstrLui)
• Lrr (simtix::Lrr)
• LowerFunctPriority (simtix::Thread)
• LowerPriority (simtix::Thread)
• Launch (simtix::system::TaskDispatcher, simtix::system::TaskDispatcherImpl)

m

• max_barrier_ids (simtix::ArchParamBuilder)
• max_function_priority_level (simtix::ArchParamBuilder, simtix::Thread)
• max_priority_level (simtix::ArchParamBuilder, simtix::Thread)
• mhartid_base (simtix::ArchParamBuilder)
• mcycle (simtix::AtomicSM, simtix::BaseSM, simtix::BaseSMImpl, simtix::pipelined::PipelinedSM)
• minstrets (simtix::AtomicSM, simtix::BaseSM, simtix::BaseSMImpl, simtix::pipelined::PipelinedSM)
• marchid (simtix::BaseSMImpl)
• mvendorid (simtix::BaseSMImpl)
• may_change_ctrl_flow (simtix::Instr, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr)
• mul_ (simtix::InstrOp)
• mulh_ (simtix::InstrOp)
• mulhsu_ (simtix::InstrOp)
• mulhu_ (simtix::InstrOp)
• mulw_ (simtix::InstrOp32)
• minstret (simtix::Warp)
• MemoryInterface (simtix::mem::MemoryInterface)
• MshrFile (simtix::mem::MshrFile)
• MSHR (simtix::mem::MshrFile::MSHR)
• mem_ports (simtix::pipelined::PipelinedSM::ParamBuilder)
• MockInstrBuffer (simtix::uvm::MockInstrBuffer)

n

• NotifyCtrlFlowChange (simtix::AtomicSMImpl, simtix::BaseSMImpl, simtix::pipelined::InstrBuffer, simtix::pipelined::PipelinedSMImpl)
• NotifyBarrier (simtix::BaseSMImpl)
• NotifyException (simtix::BaseSMImpl, simtix::pipelined::PipelinedSMImpl)
• name (simtix::BaseSMImpl, simtix::sim::Clocked, simtix::stat::Group, simtix::stat::StatBase)
• num_active_warps (simtix::BaseSMImpl)
• num_warps (simtix::BaseSMImpl)
• num_warps_per_warpgroup (simtix::BaseSMImpl)
• NotifyIssue (simtix::Gto, simtix::Lrr, simtix::RRWarpSched, simtix::Warp, simtix::WarpSched, simtix::pipelined::PCGenStage)
• nop_ (simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrOp, simtix::InstrOp32, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrOpImm32, simtix::InstrStore, simtix::InstrSystem)
• NotifyCommit (simtix::Warp)
• num_threads (simtix::Warp)
• num_tsws (simtix::Warp)
• num_valid_threads (simtix::Warp)
• NumWarps (simtix::WarpSched)
• NotifyFill (simtix::mem::MshrFile, simtix::pipelined::PCGenStage)
• NBHBCache (simtix::mem::NBHBCache)
• NBHBCacheImpl (simtix::mem::NBHBCacheImpl)
• next_pc (simtix::pipelined::InstrBuffer)
• NotifyEmpty (simtix::pipelined::PCGenStage)

o

• operator ArchParam (simtix::ArchParamBuilder)
• operator= (simtix::AtomicLoadStoreUnit::Request, simtix::CoalescingLoadStoreUnit::CoreRequest, simtix::InstrPool, simtix::InstrPtr, simtix::mem::BankedMemory, simtix::mem::CacheImpl::CoreRequest, simtix::mem::SimpleMemory, simtix::mem::SimpleMemory::Impl, simtix::stat::Formula, simtix::stat::PostfixExpr, simtix::stat::Scalar, simtix::system::SingleCoreSystem, simtix::trace::KonataRetireReporter, simtix::trace::KonataTracer, simtix::trace::OstreamTracer, tb::Testbed)
• operator< (simtix::CoalescingLoadStoreUnit::MemRequest)
• operator== (simtix::CoalescingLoadStoreUnit::MemRequest)
• OperandCollect (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem, simtix::InstrTrap, simtix::pipelined::OperandCollectStage)
• opcode (simtix::Instr)
• or_ (simtix::InstrOp)
• ori_ (simtix::InstrOpImm)
• operator-> (simtix::InstrPtr)
• operator[] (simtix::mem::BankedMemory, simtix::mem::Cache, simtix::mem::CacheImpl, simtix::mem::MemoryInterface, simtix::mem::NBHBCache, simtix::mem::SimpleMemory, simtix::mem::SimpleMemory::Impl, simtix::mem::XBar, simtix::mem::XBar::Impl, simtix::stat::Vector)
• OperandCollectStage (simtix::pipelined::OperandCollectStage)
• operand_collect_buffer_size (simtix::pipelined::PipelinedSM::ParamBuilder)
• operand_collect_width (simtix::pipelined::PipelinedSM::ParamBuilder)
• operator Param (simtix::pipelined::PipelinedSM::ParamBuilder)
• outstanding_instr_fetches (simtix::pipelined::PipelinedSM::ParamBuilder)
• outstanding_load_stores (simtix::pipelined::PipelinedSM::ParamBuilder)
• operator* (simtix::stat::PostfixExpr, simtix::stat::ScalarBase)
• operator+ (simtix::stat::PostfixExpr, simtix::stat::ScalarBase)
• operator- (simtix::stat::PostfixExpr, simtix::stat::ScalarBase)
• operator/ (simtix::stat::PostfixExpr, simtix::stat::ScalarBase)
• operator double (simtix::stat::Scalar, simtix::stat::ScalarBase, simtix::stat::Vector::Average, simtix::stat::Vector::Sum)
• operator int64_t (simtix::stat::Scalar, simtix::stat::ScalarBase, simtix::stat::Vector::Average, simtix::stat::Vector::Sum)
• operator++ (simtix::stat::Scalar)
• operator+= (simtix::stat::Scalar)
• operator-- (simtix::stat::Scalar)
• operator-= (simtix::stat::Scalar)
• operator PostfixExpr (simtix::stat::ScalarBase)
• OstreamTracer (simtix::trace::OstreamTracer)

p

• PushRegfileReadReq (simtix::AtomicArbitrator, simtix::BaseArbitrator, simtix::PipelinedArbitrator)
• PushRegfileWriteReq (simtix::AtomicArbitrator, simtix::BaseArbitrator, simtix::PipelinedArbitrator)
• PushReadRequest (simtix::AtomicLoadStoreUnit, simtix::BaseLoadStoreUnit, simtix::CoalescingLoadStoreUnit)
• PushWriteRequest (simtix::AtomicLoadStoreUnit, simtix::BaseLoadStoreUnit, simtix::CoalescingLoadStoreUnit)
• Put (simtix::AtomicLoadStoreUnit, simtix::BaseFunctionUnit, simtix::CoalescingLoadStoreUnit, simtix::FixedLatencyUnit, simtix::uvm::FrontendGolden)
• Process (simtix::AtomicSM, simtix::BaseSM, simtix::BaseSMImpl, simtix::pipelined::PipelinedSM, simtix::pipelined::PipelinedSMImpl)
• PushCoreRequest (simtix::CoalescingLoadStoreUnit)
• PipelinedArbitrator (simtix::PipelinedArbitrator)
• pc (simtix::Thread)
• priority (simtix::Thread)
• priority_f (simtix::Thread)
• pending_mshr_req_queue (simtix::mem::MshrFile)
• Probe (simtix::mem::TagArray)
• ProcessReadyFetchRequests (simtix::pipelined::FetchStage)
• PCGen (simtix::pipelined::PCGenStage)
• PCGenStage (simtix::pipelined::PCGenStage)
• PipelinedSM (simtix::pipelined::PipelinedSM)
• Param (simtix::pipelined::PipelinedSM::Param)
• PipelinedSMImpl (simtix::pipelined::PipelinedSMImpl)
• PostfixExpr (simtix::stat::PostfixExpr)
• PushExpr (simtix::stat::PostfixExpr)
• PushScalar (simtix::stat::PostfixExpr)
• PeekMemory (simtix::system::BaseSystem, simtix::system::SingleCoreSystem)
• PreloadMemory (simtix::system::BaseSystem, simtix::system::SingleCoreSystem)
• Push (simtix::trace::KonataRetireReporter)
• PutTestInput (simtix::uvm::MockInstrBuffer)

r

• ReadRegfile (simtix::AtomicArbitrator, simtix::BaseArbitrator, simtix::PipelinedArbitrator)
• Request (simtix::AtomicLoadStoreUnit::Request, simtix::PipelinedArbitrator::Request, simtix::mem::SimpleMemory::Impl::Request)
• Reset (simtix::AtomicSM, simtix::AtomicSMImpl, simtix::BaseSM, simtix::BaseSMImpl, simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrFormosa, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOp32, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrOpImm32, simtix::InstrPtr, simtix::InstrStore, simtix::InstrSystem, simtix::PipelinedArbitrator, simtix::RRWarpSched, simtix::Thread, simtix::Warp, simtix::WarpSched, simtix::pipelined::CommitStage, simtix::pipelined::InstrBuffer, simtix::pipelined::OperandCollectStage, simtix::pipelined::PCGenStage, simtix::pipelined::PipelinedSM, simtix::pipelined::PipelinedSMImpl, simtix::system::TaskDispatcher)
• ResetInstrStatus (simtix::AtomicSMImpl)
• ResetStat (simtix::AtomicSMImpl, simtix::BaseSMImpl, simtix::PipelinedArbitrator, simtix::WarpSched, simtix::mem::Cache, simtix::mem::CacheImpl, simtix::mem::CacheInterface, simtix::mem::NBHBCache, simtix::mem::NBHBCacheImpl, simtix::pipelined::PipelinedSMImpl)
• ReadCSR (simtix::BaseSMImpl, simtix::Thread, simtix::Warp)
• Reinitialize (simtix::Instr, simtix::InstrAuipc, simtix::InstrBranch, simtix::InstrJal, simtix::InstrJalr, simtix::InstrLoad, simtix::InstrLui, simtix::InstrOp, simtix::InstrOpFp, simtix::InstrOpFused, simtix::InstrOpImm, simtix::InstrStore, simtix::InstrSystem, simtix::mem::CacheImpl::WriteBufferEntry)
• rem_ (simtix::InstrOp)
• remu_ (simtix::InstrOp)
• remuw_ (simtix::InstrOp32)
• remw_ (simtix::InstrOp32)
• Recycle (simtix::InstrPool, simtix::InstrPoolInterface)
• RecycleInstrIfNotNull (simtix::InstrPtr)
• RRWarpSched (simtix::RRWarpSched)
• RaiseFunctPriority (simtix::Thread)
• RaisePriority (simtix::Thread)
• ResetPC (simtix::Thread)
• ResetPriority (simtix::Thread)
• RegisterAvailable (simtix::Warp)
• ReleasePC (simtix::Warp)
• ReleaseRegister (simtix::Warp)
• ReservePC (simtix::Warp)
• ReserveRegister (simtix::Warp)
• ResetActiveThreadMask (simtix::Warp)
• ResetScoreboard (simtix::Warp)
• rtv (simtix::Warp)
• Read (simtix::mem::BankedMemory, simtix::mem::Cache, simtix::mem::DataArray, simtix::mem::MemoryInterface, simtix::mem::NBHBCache, simtix::mem::SimpleMemory, simtix::mem::XBar)
• Replace (simtix::mem::TagArray)
• Route (simtix::mem::XBar, simtix::mem::XBar::Impl)
• RetireReadyCommitReqeusts (simtix::pipelined::CommitStage)
• RedirectInstrStream (simtix::pipelined::InstrBuffer)
• Ready (simtix::pipelined::PCGenStage)
• read_ports (simtix::pipelined::PipelinedSM::ParamBuilder)
• regfile_banks (simtix::pipelined::PipelinedSM::ParamBuilder)
• Register (simtix::sim::Clocked)
• Reduction (simtix::stat::Vector::Reduction)
• Run (simtix::system::BaseSystem, simtix::system::SingleCoreSystem, tb::Testbed)
• ResetTestInput (simtix::uvm::MockInstrBuffer)
• Report (tb::Testbed)

s

• stat (simtix::AtomicSM, simtix::AtomicSMImpl, simtix::BaseSM, simtix::BaseSMImpl, simtix::PipelinedArbitrator, simtix::WarpSched, simtix::mem::BankedMemory, simtix::mem::Cache, simtix::mem::CacheInterface, simtix::mem::NBHBCache, simtix::pipelined::PipelinedSM, simtix::pipelined::PipelinedSMImpl, simtix::system::SingleCoreSystem)
• status (simtix::AtomicSM, simtix::BaseSM, simtix::Warp, simtix::pipelined::PipelinedSM, simtix::system::TaskDispatcher)
• Stat (simtix::AtomicSMImpl::Stat, simtix::BaseSMImpl::Stat, simtix::PipelinedArbitrator::Stat, simtix::WarpSched::Stat, simtix::mem::BankedMemory::Impl::Stat, simtix::mem::CacheImpl::Stat, simtix::mem::NBHBCacheImpl::Stat, simtix::pipelined::PipelinedSMImpl::Stat)
• set_mcycle (simtix::BaseSMImpl)
• set_ssw (simtix::Instr)
• sswid (simtix::Instr)
• sll_ (simtix::InstrOp)
• slt_ (simtix::InstrOp)
• sltu_ (simtix::InstrOp)
• sra_ (simtix::InstrOp)
• srl_ (simtix::InstrOp)
• sub_ (simtix::InstrOp)
• sllw_ (simtix::InstrOp32)
• sraw_ (simtix::InstrOp32)
• srlw_ (simtix::InstrOp32)
• subw_ (simtix::InstrOp32)
• slli_ (simtix::InstrOpImm)
• slti_ (simtix::InstrOpImm)
• sltiu_ (simtix::InstrOpImm)
• srai_ (simtix::InstrOpImm)
• srli_ (simtix::InstrOpImm)
• slliw_ (simtix::InstrOpImm32)
• sraiw_ (simtix::InstrOpImm32)
• srliw_ (simtix::InstrOpImm32)
• size (simtix::InstrPool, simtix::pipelined::InstrBuffer)
• set_first_stage_name (simtix::InstrPtr)
• set_flushed (simtix::InstrPtr)
• ssw (simtix::InstrPtr)
• sb_ (simtix::InstrStore)
• sd_ (simtix::InstrStore)
• sh_ (simtix::InstrStore)
• sw_ (simtix::InstrStore)
• SelectWarp (simtix::RRWarpSched, simtix::WarpSched)
• SetPriority (simtix::Thread)
• set_pc (simtix::Thread)
• set_xcllx (simtix::Thread)
• set_xclly (simtix::Thread)
• set_xcllz (simtix::Thread)
• ScoreboardClean (simtix::Warp)
• set_active_thread_mask (simtix::Warp)
• set_bid (simtix::Warp)
• set_mcause (simtix::Warp)
• set_mepc (simtix::Warp)
• set_mtval (simtix::Warp)
• set_num_active_tsws (simtix::Warp)
• set_status (simtix::Warp)
• set_wc (simtix::Warp)
• sswpc (simtix::Warp)
• swap_active_thread_mask (simtix::Warp)
• SimpleMemory (simtix::mem::SimpleMemory)
• ServePendingFetchReq (simtix::pipelined::FetchBuf)
• ServePendingFetchResp (simtix::pipelined::FetchBuf)
• set_fetch_pc (simtix::pipelined::InstrBuffer)
• schedule_width (simtix::pipelined::PipelinedSM::ParamBuilder)
• shared_ports (simtix::pipelined::PipelinedSM::ParamBuilder)
• swizzle (simtix::pipelined::PipelinedSM::ParamBuilder)
• Schedule (simtix::pipelined::ScheduleStage)
• ScheduleStage (simtix::pipelined::ScheduleStage)
• SizedQueue (simtix::sim::SizedQueue)
• Scalar (simtix::stat::Scalar)
• ScalarBase (simtix::stat::ScalarBase)
• StatBase (simtix::stat::StatBase)
• Sum (simtix::stat::Vector::Sum)
• sum (simtix::stat::Vector)
• SingleCoreSystem (simtix::system::SingleCoreSystem)
• SingleCoreSystemStat (simtix::system::SingleCoreSystem::SingleCoreSystemStat)
• sm (simtix::system::SingleCoreSystem)

t

• threads_per_warp (simtix::ArchParamBuilder)
• ToRegfileIndex (simtix::AtomicArbitrator, simtix::PipelinedArbitrator)
• Tick (simtix::AtomicLoadStoreUnit, simtix::AtomicSM, simtix::AtomicSMImpl, simtix::BaseSMImpl, simtix::CoalescingLoadStoreUnit, simtix::mem::BankedMemory, simtix::mem::Cache, simtix::mem::NBHBCache, simtix::mem::SimpleMemory, simtix::mem::SimpleMemory::Impl, simtix::mem::XBar, simtix::mem::XBar::Impl, simtix::pipelined::PipelinedSM, simtix::pipelined::PipelinedSMImpl, simtix::sim::Clocked, simtix::sim::FcfsDelayQueue, simtix::sim::GenericDelayQueue, simtix::system::TaskDispatcher, simtix::trace::KonataRetireReporter, simtix::uvm::FrontendGolden, simtix::uvm::FrontendGoldenImpl)
• ToLineAddr (simtix::CoalescingLoadStoreUnit, simtix::mem::CacheImpl, simtix::mem::DataArray, simtix::mem::MshrFile, simtix::mem::TagArray)
• ToLineOffset (simtix::CoalescingLoadStoreUnit, simtix::mem::DataArray)
• tswid (simtix::Instr)
• ToRegfileBank (simtix::PipelinedArbitrator)
• Thread (simtix::Thread)
• tid (simtix::Thread)
• thread (simtix::Warp)
• tsw_active_threads (simtix::Warp)
• ToBankIndex (simtix::mem::BankedMemory::Impl, simtix::mem::NBHBCacheImpl)
• ToBankedAddr (simtix::mem::BankedMemory::Impl)
• ToBankedAddrOffset (simtix::mem::BankedMemory::Impl)
• ToBankAddr (simtix::mem::DataArray, simtix::mem::TagArray)
• ToSetIndex (simtix::mem::DataArray, simtix::mem::TagArray)
• TagArray (simtix::mem::TagArray)
• ToFetchAddress (simtix::pipelined::PCGenStage)
• Tabularize (simtix::stat::Formula, simtix::stat::Group, simtix::stat::Scalar, simtix::stat::ScalarBase, simtix::stat::StatBase, simtix::stat::Vector)
• TearDown (simtix::system::BaseSystem, simtix::system::SingleCoreSystem)
• td (simtix::system::SingleCoreSystem)
• TaskDispatcher (simtix::system::TaskDispatcher)
• TaskDispatcherImpl (simtix::system::TaskDispatcherImpl)
• Testbed (tb::Testbed)
• TestbedStat (tb::Testbed::TestbedStat)

u

• unique_id (simtix::InstrPtr)
• UpdateCommittedInstrStat (simtix::Warp)
• UpdateStat (simtix::mem::CacheImpl)
• UpdateTag (simtix::mem::TagArray)
• UpdateFetchPC (simtix::pipelined::InstrBuffer)
• Unregister (simtix::sim::Clocked)
• unit (simtix::stat::StatBase)

v

• VectorLoad (simtix::InstrLoad)
• VectorStore (simtix::InstrStore)
• Valid (simtix::mem::XBar, simtix::mem::XBar::Impl)
• valid (simtix::pipelined::InstrBuffer)
• Vector (simtix::stat::Vector)

w

• warp_sched_policy (simtix::ArchParamBuilder)
• warps_per_core (simtix::ArchParamBuilder)
• warps_per_warp_group (simtix::ArchParamBuilder)
• WriteRegfile (simtix::AtomicArbitrator, simtix::BaseArbitrator, simtix::PipelinedArbitrator)
• WorkGroupStat (simtix::AtomicSMImpl::WorkGroupStat, simtix::BaseSMImpl::WorkGroupStat, simtix::pipelined::PipelinedSMImpl::WorkGroupStat)
• wg_stat (simtix::AtomicSMImpl, simtix::BaseSMImpl, simtix::pipelined::PipelinedSMImpl)
• warps (simtix::BaseSMImpl)
• wid (simtix::Instr, simtix::InstrPtr, simtix::Thread, simtix::Warp)
• wpc (simtix::Instr, simtix::InstrPtr, simtix::Warp)
• WriteCSR (simtix::Thread)
• Warp (simtix::Warp)
• wc (simtix::Warp)
• WarpSched (simtix::WarpSched)
• Write (simtix::mem::BankedMemory, simtix::mem::Cache, simtix::mem::DataArray, simtix::mem::MemoryInterface, simtix::mem::NBHBCache, simtix::mem::SimpleMemory, simtix::mem::XBar)
• WriteBufferEntry (simtix::mem::CacheImpl::WriteBufferEntry)
• write_ports (simtix::pipelined::PipelinedSM::ParamBuilder)
• WarpAdditionalCheck (simtix::pipelined::PipelinedSMImpl)

x

• xclgoffx (simtix::BaseSMImpl)
• xclgoffy (simtix::BaseSMImpl)
• xclgoffz (simtix::BaseSMImpl)
• xclgsx (simtix::BaseSMImpl)
• xclgsy (simtix::BaseSMImpl)
• xclgsz (simtix::BaseSMImpl)
• xclsx (simtix::BaseSMImpl)
• xclsy (simtix::BaseSMImpl)
• xclsz (simtix::BaseSMImpl)
• xclwx (simtix::BaseSMImpl)
• xclwy (simtix::BaseSMImpl)
• xclwz (simtix::BaseSMImpl)
• xdim (simtix::BaseSMImpl)
• xkernelarg (simtix::BaseSMImpl)
• xkernelpc (simtix::BaseSMImpl)
• xmhartidbase (simtix::BaseSMImpl)
• xor_ (simtix::InstrOp)
• xori_ (simtix::InstrOpImm)
• XBar (simtix::mem::XBar)

~

• ~AtomicArbitrator (simtix::AtomicArbitrator)
• ~AtomicLoadStoreUnit (simtix::AtomicLoadStoreUnit)
• ~Impl (simtix::AtomicSM::Impl, simtix::mem::BankedMemory::Impl, simtix::mem::SimpleMemory::Impl, simtix::pipelined::PipelinedSM::Impl, simtix::uvm::FrontendGolden::Impl)
• ~AtomicSM (simtix::AtomicSM)
• ~AtomicSMImpl (simtix::AtomicSMImpl)
• ~BaseArbitrator (simtix::BaseArbitrator)
• ~BaseFunctionUnit (simtix::BaseFunctionUnit)
• ~BaseSM (simtix::BaseSM)
• ~BaseSMImpl (simtix::BaseSMImpl)
• ~CoalescingLoadStoreUnit (simtix::CoalescingLoadStoreUnit)
• ~Instr (simtix::Instr)
• ~InstrPool (simtix::InstrPool)
• ~InstrPtr (simtix::InstrPtr)
• ~InstrQueue (simtix::InstrQueue)
• ~PipelinedArbitrator (simtix::PipelinedArbitrator)
• ~Warp (simtix::Warp)
• ~WarpSched (simtix::WarpSched)
• ~BankedMemory (simtix::mem::BankedMemory)
• ~Cache (simtix::mem::Cache)
• ~DataArrayRequest (simtix::mem::CacheImpl::DataArrayRequest)
• ~CacheImpl (simtix::mem::CacheImpl)
• ~CacheInterface (simtix::mem::CacheInterface)
• ~DataArray (simtix::mem::DataArray)
• ~MemoryInterface (simtix::mem::MemoryInterface)
• ~MshrFile (simtix::mem::MshrFile)
• ~NBHBCache (simtix::mem::NBHBCache)
• ~SimpleMemory (simtix::mem::SimpleMemory)
• ~TagArray (simtix::mem::TagArray)
• ~XBar (simtix::mem::XBar)
• ~CommitStage (simtix::pipelined::CommitStage)
• ~DecodeStage (simtix::pipelined::DecodeStage)
• ~ExecuteStage (simtix::pipelined::ExecuteStage)
• ~FetchStage (simtix::pipelined::FetchStage)
• ~InstrBuffer (simtix::pipelined::InstrBuffer)
• ~OperandCollectStage (simtix::pipelined::OperandCollectStage)
• ~PCGenStage (simtix::pipelined::PCGenStage)
• ~PipelinedSM (simtix::pipelined::PipelinedSM)
• ~PipelinedSMImpl (simtix::pipelined::PipelinedSMImpl)
• ~ScheduleStage (simtix::pipelined::ScheduleStage)
• ~Clocked (simtix::sim::Clocked)
• ~SizedQueue (simtix::sim::SizedQueue)
• ~BaseSystem (simtix::system::BaseSystem)
• ~SingleCoreSystem (simtix::system::SingleCoreSystem)
• ~TaskDispatcher (simtix::system::TaskDispatcher)
• ~KonataRetireReporter (simtix::trace::KonataRetireReporter)
• ~FrontendGolden (simtix::uvm::FrontendGolden)
• ~FrontendGoldenImpl (simtix::uvm::FrontendGoldenImpl)
• ~MockInstrBuffer (simtix::uvm::MockInstrBuffer)
• ~Testbed (tb::Testbed)