Class Members
a
- AToG (AToG)
- arm_to_gen_map_ (GToA)
- arm_payload_ (axi_tlm_extension)
- axi_tlm_extension (axi_tlm_extension)
- AddPayloadImpl (ipc::BaseAgent, simple::Initiator)
- AcceptConnections (ipc::Server)
- accept_thread_ (ipc::Server)
- Allocate (mm::Simple)
- aq (rv64::Instruction)
- address (rv64::csr_pmpaddr)
- asid (rv64::csr_satp)
- AXITarget (simple::Initiator)
- add_payload (simple::Initiator)
- axi_target (simple::Initiator)
- axi_target_ (simple::Initiator)
- atog_ (simple::Memory)
- axi_port (simple::Memory)
- AttachClock (simtix::TickManager)
- AcceptRequest (simtix::ToTlm)
b
- bind_mem_port (cp::TLM_MemIF)
- byte_enable_ (cp::TLM_MemIF)
- BaseAgent (ipc::BaseAgent)
- bw_queue_ (ipc::BaseAgent)
- byte_enable_map_ (ipc::BaseAgent)
- bw_queue (ipc::Server)
- breakpoints (rv64::Core)
- B_imm (rv64::Instruction)
- base (rv64::csr_mtvec)
- bank (rv64::csr_mvendorid)
- buf_ (simple::PrintBuf)
c
- clock_ (AToG, GToA, ipc::DbgAgent, ipc::TimingAgent, simple::Initiator, simple::Memory, simple::PrintBuf, simtix::FromTlm, simtix::TickManager, simtix::ToTlm)
- clock_negedge (AToG, GToA)
- condition_ (MsgQueue)
- clone (axi_tlm_extension)
- copy_from (axi_tlm_extension)
- CommandProcessor (cp::CommandProcessor)
- clk_ (cp::CommandProcessor)
- core (cp::CommandProcessor)
- client_fd (cp::GDBStub)
- connect (cp::GDBStub)
- clock (ipc::DbgAgent, ipc::TimingAgent, simple::Initiator, simple::Memory, simple::PrintBuf, simtix::FromTlm, simtix::ToTlm)
- clock_i_ (ipc::DbgAgent, ipc::TimingAgent, simple::Initiator, simple::Memory, simple::PrintBuf, simtix::FromTlm, simtix::ToTlm)
- client_signal_map_ (ipc::Server)
- client_threads_ (ipc::Server)
- Ctor (lua::Ctor)
- Core (rv64::Core)
- compute_pending_interrupts (rv64::Core)
- counter_update (rv64::Core)
- csr (rv64::Core, rv64::Instruction)
- c_b12 (rv64::Instruction)
- c_f2_high (rv64::Instruction)
- c_f2_low (rv64::Instruction)
- c_format (rv64::Instruction)
- c_imm (rv64::Instruction)
- c_opcode (rv64::Instruction)
- c_rd (rv64::Instruction)
- c_rd_small (rv64::Instruction)
- c_rs2 (rv64::Instruction)
- c_rs2_small (rv64::Instruction)
- c_uimm (rv64::Instruction)
- CY (rv64::csr_mcounteren, rv64::csr_mcountinhibit)
- csr_misa (rv64::csr_misa)
- csr_mstatus (rv64::csr_mstatus)
- checked_write (rv64::csr_mtvec)
- csr_table (rv64::csr_table)
- cycle (rv64::csr_table)
- CloseFile (simple::PrintBuf)
d
- data_to_send_ (GToA)
- debug_mode (cp::CommandProcessor, rv64::Core)
- debug_ (cp::GDBStub)
- deserialize_regs (cp::GDBStub)
- disable_debug (debug_if, rv64::Core)
- data (ipc::BaseAgent::MsgInfo, rv64::Instruction)
- data_size (ipc::BaseAgent::MsgInfo)
- DbgAgent (ipc::DbgAgent)
- data_mem (rv64::Core)
- decode (rv64::Instruction)
- decode_16 (rv64::Instruction)
- decode_32 (rv64::Instruction)
- DZ (rv64::csr_fcsr)
- default_read64 (rv64::csr_table)
- default_write64 (rv64::csr_table)
- dummy_byte_ (simtix::ToTlm)
e
- Empty (MsgQueue)
- Erase (ThreadSafeMap)
- enable_log (cp::GDBStub)
- enable_debug (debug_if, rv64::Core)
- EndResponse (ipc::TimingAgent, simple::Initiator, simtix::ToTlm)
- enable_trace (rv64::Core)
- exec_step (rv64::Core)
- ext_interrupt (rv64::Core)
- e (rv64::RegFile)
- exception_code (rv64::csr_mcause)
- extensions (rv64::csr_misa)
f
- Find (ThreadSafeMap)
- ForEach (ThreadSafeMap)
- from_ (dbg::Monitor)
- fw_queue_ (ipc::BaseAgent)
- ForwardPayload (ipc::DbgAgent)
- fw_queue (ipc::Server)
- free (mm::Simple, mm::detail::NullMM)
- fence_fm (rv64::Instruction)
- fence_pred (rv64::Instruction)
- fence_succ (rv64::Instruction)
- frm (rv64::Instruction, rv64::csr_fcsr)
- funct12 (rv64::Instruction)
- funct2 (rv64::Instruction)
- funct3 (rv64::Instruction)
- funct5 (rv64::Instruction)
- funct6 (rv64::Instruction)
- funct7 (rv64::Instruction)
- fflags (rv64::csr_fcsr)
- fields (rv64::csr_fcsr, rv64::csr_mcause, rv64::csr_mcounteren, rv64::csr_mcountinhibit, rv64::csr_mie, rv64::csr_mip, rv64::csr_misa, rv64::csr_mstatus, rv64::csr_mtvec, rv64::csr_mvendorid, rv64::csr_pmpaddr, rv64::csr_satp)
- fs (rv64::csr_mstatus)
- fcsr (rv64::csr_table)
- FlushAll (simple::PrintBuf)
- FlushBuffer (simple::PrintBuf)
- file_ (simple::PrintBuf)
- FromTlm (simtix::FromTlm)
- fifo_size_ (simtix::ToTlm)
- from_table_t (simtix::from_table_t)
g
- GToA (GToA)
- gen_to_arm_map_ (GToA)
- get_clk (cp::CommandProcessor)
- get_target (cp::CommandProcessor)
- GDBStub (cp::GDBStub)
- gdb_main (cp::GDBStub)
- get_program_counter (debug_if, rv64::Core)
- get_registers (debug_if, rv64::Core)
- get_status (debug_if, rv64::Core)
- GetInstance (mm::Simple)
- get_csr_value (rv64::Core)
- get_regs (rv64::RegFile)
- get_base_address (rv64::csr_mtvec)
- get_address (rv64::csr_pmpaddr)
- get_read_data (simple::Initiator)
- gtoa_ (simple::Initiator)
h
- handle_packet (cp::GDBStub)
- HandleClient (ipc::Server)
- HandleInterrupt (ipc::TimingAgent)
- has_C_extension (rv64::csr_misa)
- has_supervisor_mode_extension (rv64::csr_misa)
- has_user_mode_extension (rv64::csr_misa)
- HasPendingTasks (simtix::ToTlm)
i
- initiator_ (AToG, GToA)
- Insert (ThreadSafeMap)
- insert_breakpoint (debug_if, rv64::Core)
- InsertResponse (ipc::BaseAgent)
- irq_i_ (ipc::TimingAgent)
- instr (rv64::Core, rv64::Instruction)
- instr_mem (rv64::Core)
- is_invalid_csr_access (rv64::Core)
- I_imm (rv64::Instruction)
- Instruction (rv64::Instruction)
- is_compressed (rv64::Instruction)
- interrupt (rv64::csr_mcause)
- IR (rv64::csr_mcounteren, rv64::csr_mcountinhibit)
- init (rv64::csr_misa)
- instret (rv64::csr_table)
- is_valid_csr64_addr (rv64::csr_table)
- Initiator (simple::Initiator)
- is_write (simtix::ToTlm::Request)
j
- J_imm (rv64::Instruction)
l
- log (cp::GDBStub)
- load_ (cp::TLM_MemIF)
- load_byte (cp::TLM_MemIF, data_memory_if, debug_if, rv64::Core)
- load_double (cp::TLM_MemIF, data_memory_if)
- load_half (cp::TLM_MemIF, data_memory_if)
- load_instr (cp::TLM_MemIF, instr_memory_if)
- load_ubyte (cp::TLM_MemIF, data_memory_if)
- load_uhalf (cp::TLM_MemIF, data_memory_if)
- load_uword (cp::TLM_MemIF, data_memory_if)
- load_word (cp::TLM_MemIF, data_memory_if)
- LuaBytes (dbg::MemoryDebugger, simple::Initiator, simple::Memory, simple::PrintBuf)
- load_elf (dbg::MemoryDebugger, simple::Memory)
- load_time_us (lua::Ctor)
- load_time_us_ (lua::Ctor)
- last_pc (rv64::Core)
- latency_ (simple::Memory)
m
- mutex_ (MsgQueue, ThreadSafeMap)
- map_ (ThreadSafeMap)
- mem_if (cp::CommandProcessor)
- mem_port_ (cp::TLM_MemIF, dbg::MemoryDebugger, ipc::DbgAgent, ipc::TimingAgent, simple::Initiator, simtix::ToTlm)
- mem_req_ (cp::TLM_MemIF)
- mem_resp_ack_ (cp::TLM_MemIF)
- MemoryDebugger (dbg::MemoryDebugger)
- Monitor (dbg::Monitor)
- msgid (ipc::BaseAgent::MsgInfo, ipc::BaseAgent::TrunkInfo)
- msg_info_map_ (ipc::BaseAgent)
- mtval (rv64::SimulationTrap, rv64::csr_table)
- meie (rv64::csr_mie)
- msie (rv64::csr_mie)
- mtie (rv64::csr_mie)
- meip (rv64::csr_mip)
- msip (rv64::csr_mip)
- mtip (rv64::csr_mip)
- mxl (rv64::csr_misa)
- mie (rv64::csr_mstatus, rv64::csr_table)
- mpie (rv64::csr_mstatus)
- mpp (rv64::csr_mstatus)
- mprv (rv64::csr_mstatus)
- mxr (rv64::csr_mstatus)
- Mode (rv64::csr_mtvec)
- mode (rv64::csr_mtvec, rv64::csr_satp)
- marchid (rv64::csr_table)
- mcause (rv64::csr_table)
- mcounteren (rv64::csr_table)
- mcountinhibit (rv64::csr_table)
- medeleg (rv64::csr_table)
- mepc (rv64::csr_table)
- mhartid (rv64::csr_table)
- mideleg (rv64::csr_table)
- mimpid (rv64::csr_table)
- mip (rv64::csr_table)
- misa (rv64::csr_table)
- mscratch (rv64::csr_table)
- mstatus (rv64::csr_table)
- mtvec (rv64::csr_table)
- mvendorid (rv64::csr_table)
- Memory (simple::Memory)
- mem_ (simple::Memory)
n
- nb_transport_bw (AToG, GToA, cp::TLM_MemIF, dbg::Monitor, ipc::TimingAgent, simple::Initiator, simtix::ToTlm)
- nb_transport_bw_untimed (AToG)
- nb_transport_fw (AToG, GToA, dbg::Monitor, simple::Memory, simple::PrintBuf, simtix::FromTlm)
- nb_transport_fw_untimed (GToA)
- need_resp (cp::GDBStub)
- num_modules (lua::Ctor)
- num_modules_ (lua::Ctor)
- NV (rv64::csr_fcsr)
- NX (rv64::csr_fcsr)
- num_entries (simple::PrintBuf)
- num_entries_ (simple::PrintBuf)
- next_level (simtix::FromTlm)
- next_level_ (simtix::FromTlm)
o
- operator= (lua::Ctor, simtix::TickManager, simtix::ToTlm::Request)
- op (rv64::Core)
- opcode (rv64::Instruction)
- operator[] (rv64::RegFile, simtix::ToTlm)
- OF (rv64::csr_fcsr)
- offset (rv64::csr_mvendorid)
- on_resp (simtix::ToTlm::Request)
- operator ArchParam (simtix::from_table_t)
p
- peq_ (AToG, GToA, ipc::TimingAgent, simple::Initiator, simtix::ToTlm)
- process_req (AToG)
- process_resp (GToA)
- Pop (MsgQueue)
- Push (MsgQueue)
- parse_mem_req (cp::GDBStub)
- PrintPayload (dbg::Monitor)
- ProcessFWQueue (ipc::BaseAgent)
- payload_data_map_ (ipc::BaseAgent, simple::Initiator)
- payload_q_ (ipc::BaseAgent, simple::Initiator)
- PidSignal (ipc::Server)
- pool_ (mm::Simple)
- pc (rv64::Core)
- pc_alignment_mask (rv64::Core)
- prepare_interrupt (rv64::Core)
- prepare_trap (rv64::Core)
- prv (rv64::Core)
- pending (rv64::PendingInterrupts)
- ppn (rv64::csr_satp)
- pmpaddr (rv64::csr_table)
- pmpcfg (rv64::csr_table)
- ProcessRequest (simple::Memory, simple::PrintBuf, simtix::FromTlm, simtix::ToTlm)
- port_ (simple::Memory, simple::PrintBuf, simtix::FromTlm)
- PrintBuf (simple::PrintBuf)
- ProcessResponse (simtix::ToTlm)
- payload (simtix::ToTlm::Request)
- Param (simtix::from_table_t)
q
- queue_ (MsgQueue)
- quadrant (rv64::Instruction)
r
- read_state_ (AToG, GToA)
- req_payload_ (AToG)
- resp_gen_payload_ (AToG)
- resp_queue_ (AToG)
- resp_to_send_ (AToG)
- req_queue_ (GToA)
- resp_payload_ (GToA)
- read_ext_interrupt (cp::CommandProcessor)
- read_sw_interrupt (cp::CommandProcessor)
- read_timer_interrupt (cp::CommandProcessor)
- receive_packet (cp::GDBStub)
- req_ack_ (cp::TLM_MemIF)
- resp_recv_ (cp::TLM_MemIF)
- read_bytes (dbg::MemoryDebugger, simple::Memory)
- read_register (debug_if, rv64::Core)
- remove_breakpoint (debug_if, rv64::Core)
- ReceivePayload (ipc::Server)
- RegisterSignal (ipc::Server)
- Response (ipc::Server, simple::Memory, simple::PrintBuf, simtix::FromTlm)
- running_ (ipc::Server)
- regs (rv64::Core, rv64::RegFile)
- return_from_trap_handler (rv64::Core)
- run (rv64::Core)
- run_step (rv64::Core)
- rd (rv64::Instruction)
- rl (rv64::Instruction)
- rs1 (rv64::Instruction)
- rs2 (rv64::Instruction)
- rs3 (rv64::Instruction)
- RegFile (rv64::RegFile)
- read (rv64::RegFile)
- reason (rv64::SimulationTrap)
- reg (rv64::csr_64, rv64::csr_fcsr, rv64::csr_mcause, rv64::csr_mcounteren, rv64::csr_mcountinhibit, rv64::csr_mepc, rv64::csr_mie, rv64::csr_mip, rv64::csr_misa, rv64::csr_mstatus, rv64::csr_mtvec, rv64::csr_mvendorid, rv64::csr_pmpaddr, rv64::csr_pmpcfg, rv64::csr_satp)
- reserved (rv64::csr_fcsr, rv64::csr_mcounteren, rv64::csr_mcountinhibit)
- register_mapping (rv64::csr_table)
- read_data_ (simple::Initiator)
- req_fifo_ (simple::Memory, simple::PrintBuf, simtix::FromTlm, simtix::ToTlm)
- resp_end_event_ (simple::Memory, simple::PrintBuf, simtix::FromTlm)
- resp_fifo_ (simple::Memory, simple::PrintBuf, simtix::FromTlm, simtix::ToTlm)
- ReceiveData (simple::PrintBuf)
- Read (simtix::ToTlm)
- req_map_ (simtix::ToTlm)
- Request (simtix::ToTlm::Request)
s
- Size (MsgQueue)
- SC_NAMED (cp::CommandProcessor)
- set_clk (cp::CommandProcessor)
- set_ext_int (cp::CommandProcessor)
- set_pc (cp::CommandProcessor, rv64::Core)
- set_sw_int (cp::CommandProcessor)
- set_target (cp::CommandProcessor, dbg::MemoryDebugger, ipc::DbgAgent, ipc::TimingAgent, simple::Initiator, simtix::ToTlm)
- set_timer_int (cp::CommandProcessor)
- stub (cp::CommandProcessor)
- send_ack (cp::GDBStub)
- send_packet (cp::GDBStub)
- serialize_byte (cp::GDBStub)
- serialize_regs (cp::GDBStub)
- server_fd (cp::GDBStub)
- set_debug_if (cp::GDBStub)
- setup_trans (cp::TLM_MemIF)
- store_ (cp::TLM_MemIF)
- store_byte (cp::TLM_MemIF, data_memory_if, debug_if, rv64::Core)
- store_double (cp::TLM_MemIF, data_memory_if)
- store_half (cp::TLM_MemIF, data_memory_if)
- store_word (cp::TLM_MemIF, data_memory_if)
- SendTransactionDbg (dbg::MemoryDebugger)
- Socket (dbg::MemoryDebugger)
- set_to (dbg::Monitor)
- set_single_step (debug_if, rv64::Core)
- set_status (debug_if, rv64::Core)
- start_offset (ipc::BaseAgent::MsgInfo)
- server_ (ipc::BaseAgent)
- socket_path_ (ipc::BaseAgent, ipc::Server)
- set_clock (ipc::DbgAgent, ipc::TimingAgent, simple::Initiator, simple::Memory, simple::PrintBuf, simtix::FromTlm, simtix::ToTlm)
- SendError (ipc::Server)
- SendSignal (ipc::Server)
- SendSignalToAllClients (ipc::Server)
- Server (ipc::Server)
- Start (ipc::Server)
- Stop (ipc::Server)
- socket_fd_ (ipc::Server)
- set_irq (ipc::TimingAgent)
- Simple (mm::Simple)
- set_csr_value (rv64::Core)
- set_data_mem (rv64::Core)
- set_instr_mem (rv64::Core)
- shall_exit (rv64::Core)
- single_step (rv64::Core)
- status (rv64::Core)
- sw_interrupt (rv64::Core)
- switch_to_trap_handler (rv64::Core)
- S_imm (rv64::Instruction)
- shamt (rv64::Instruction, rv64::RegFile)
- shamt_w (rv64::Instruction, rv64::RegFile)
- show (rv64::RegFile)
- seie (rv64::csr_mie)
- ssie (rv64::csr_mie)
- stie (rv64::csr_mie)
- seip (rv64::csr_mip)
- ssip (rv64::csr_mip)
- stip (rv64::csr_mip)
- sd (rv64::csr_mstatus)
- sie (rv64::csr_mstatus)
- spie (rv64::csr_mstatus)
- spp (rv64::csr_mstatus)
- sum (rv64::csr_mstatus)
- sxl (rv64::csr_mstatus)
- satp (rv64::csr_table)
- scause (rv64::csr_table)
- scounteren (rv64::csr_table)
- sedeleg (rv64::csr_table)
- sepc (rv64::csr_table)
- sideleg (rv64::csr_table)
- sscratch (rv64::csr_table)
- stval (rv64::csr_table)
- stvec (rv64::csr_table)
- set_axi_target (simple::Initiator)
- size (simple::Memory)
- size_ (simple::Memory)
- set_next_level (simtix::FromTlm)
t
- target_ (AToG, GToA, cp::CommandProcessor, dbg::MemoryDebugger, dbg::Monitor, ipc::DbgAgent, ipc::TimingAgent, simple::Initiator, simtix::ToTlm)
- TryPop (MsgQueue)
- Target (cp::CommandProcessor, cp::TLM_MemIF, dbg::MemoryDebugger, dbg::Monitor, ipc::DbgAgent, ipc::TimingAgent, simple::Initiator, simtix::ToTlm)
- thread_proc (cp::CommandProcessor)
- TLM_MemIF (cp::TLM_MemIF)
- target (dbg::MemoryDebugger, ipc::DbgAgent, ipc::TimingAgent, simple::Initiator, simtix::ToTlm)
- to (dbg::Monitor)
- to_ (dbg::Monitor)
- trunks (ipc::BaseAgent::MsgInfo)
- trunks_acked (ipc::BaseAgent::MsgInfo)
- trunkid (ipc::BaseAgent::TrunkInfo)
- trunk_info_map_ (ipc::BaseAgent)
- timeout_ (ipc::Server)
- ThreadProcess (ipc::TimingAgent, simple::Initiator)
- TimingAgent (ipc::TimingAgent)
- target_ready_ (ipc::TimingAgent, simple::Initiator, simtix::ToTlm)
- timer_interrupt (rv64::Core)
- trap_check_addr_alignment (rv64::Core)
- trap_check_pc_alignment (rv64::Core)
- target_mode (rv64::PendingInterrupts)
- TM (rv64::csr_mcounteren)
- tsr (rv64::csr_mstatus)
- tvm (rv64::csr_mstatus)
- tw (rv64::csr_mstatus)
- time (rv64::csr_table)
- transport_dbg (simple::Memory, simple::PrintBuf)
- Tick (simtix::TickManager, simtix::ToTlm)
- TickManager (simtix::TickManager)
- ToTlm (simtix::ToTlm)
- table (simtix::from_table_t)
u
- U_imm (rv64::Instruction)
- UF (rv64::csr_fcsr)
- ueie (rv64::csr_mie)
- usie (rv64::csr_mie)
- utie (rv64::csr_mie)
- ueip (rv64::csr_mip)
- usip (rv64::csr_mip)
- utip (rv64::csr_mip)
- uie (rv64::csr_mstatus)
- upie (rv64::csr_mstatus)
- uxl (rv64::csr_mstatus)
- ucause (rv64::csr_table)
- uepc (rv64::csr_table)
- uscratch (rv64::csr_table)
- utval (rv64::csr_table)
- utvec (rv64::csr_table)
v
- validate_csr_counter_read_access_rights (rv64::Core)
w
- write_state_ (AToG, GToA)
- wait_ack (cp::GDBStub)
- write_bytes (dbg::MemoryDebugger, simple::Memory, simple::PrintBuf)
- write_register (debug_if, rv64::Core)
- write (rv64::RegFile)
- wpri1 (rv64::csr_mie, rv64::csr_mstatus)
- wpri2 (rv64::csr_mie, rv64::csr_mstatus)
- wpri3 (rv64::csr_mie, rv64::csr_mstatus)
- wpri4 (rv64::csr_mie, rv64::csr_mstatus)
- wiri1 (rv64::csr_mip)
- wiri2 (rv64::csr_mip)
- wiri3 (rv64::csr_mip)
- wiri4 (rv64::csr_mip)
- wiri (rv64::csr_misa)
- wpri5 (rv64::csr_mstatus)
- Write (simtix::ToTlm)
x
- xs (rv64::csr_mstatus)
z
- zimm (rv64::Instruction)
- zero (rv64::csr_mcountinhibit, rv64::csr_pmpaddr)
~
- ~AToG (AToG)
- ~GToA (GToA)
- ~axi_tlm_extension (axi_tlm_extension)
- ~GDBStub (cp::GDBStub)
- ~data_memory_if (data_memory_if)
- ~MemoryDebugger (dbg::MemoryDebugger)
- ~Monitor (dbg::Monitor)
- ~debug_if (debug_if)
- ~instr_memory_if (instr_memory_if)
- ~Server (ipc::Server)
- ~Simple (mm::Simple)
- ~Memory (simple::Memory)
- ~PrintBuf (simple::PrintBuf)
- ~FromTlm (simtix::FromTlm)
- ~TickManager (simtix::TickManager)
- ~Request (simtix::ToTlm::Request)
- ~ToTlm (simtix::ToTlm)
_
- _ (rv64::csr_fcsr)
- _unused (rv64::csr_mvendorid)
@
- @39 (rv64::csr_fcsr)
- @22 (rv64::csr_mcause)
- @25 (rv64::csr_mcounteren)
- @28 (rv64::csr_mcountinhibit)
- @20 (rv64::csr_mepc)
- @14 (rv64::csr_mie)
- @17 (rv64::csr_mip)
- @1 (rv64::csr_misa)
- @2 (rv64::csr_misa)
- @8 (rv64::csr_mstatus)
- @11 (rv64::csr_mtvec)
- @5 (rv64::csr_mvendorid)
- @33 (rv64::csr_pmpaddr)
- @31 (rv64::csr_pmpcfg)
- @36 (rv64::csr_satp)