Class Member Variables

a

• arm_to_gen_map_ (GToA)
• arm_payload_ (axi_tlm_extension)
• accept_thread_ (ipc::Server)
• address (rv64::csr_pmpaddr)
• asid (rv64::csr_satp)
• axi_target_ (simple::Initiator)
• atog_ (simple::Memory)

b

• byte_enable_ (cp::TLM_MemIF)
• bw_queue_ (ipc::BaseAgent)
• byte_enable_map_ (ipc::BaseAgent)
• bw_queue (ipc::Server)
• breakpoints (rv64::Core)
• base (rv64::csr_mtvec)
• bank (rv64::csr_mvendorid)
• buf_ (simple::PrintBuf)

c

• clock_ (AToG, GToA, ipc::DbgAgent, ipc::TimingAgent, simple::Initiator, simple::Memory, simple::PrintBuf, simtix::FromTlm, simtix::TickManager, simtix::ToTlm)
• condition_ (MsgQueue)
• clk_ (cp::CommandProcessor)
• core (cp::CommandProcessor)
• client_fd (cp::GDBStub)
• clock_i_ (ipc::DbgAgent, ipc::TimingAgent, simple::Initiator, simple::Memory, simple::PrintBuf, simtix::FromTlm, simtix::ToTlm)
• client_signal_map_ (ipc::Server)
• client_threads_ (ipc::Server)
• csr (rv64::Core)
• CY (rv64::csr_mcounteren, rv64::csr_mcountinhibit)
• cycle (rv64::csr_table)

d

• data_to_send_ (GToA)
• debug_mode (cp::CommandProcessor, rv64::Core)
• debug_ (cp::GDBStub)
• data (ipc::BaseAgent::MsgInfo)
• data_size (ipc::BaseAgent::MsgInfo)
• data_mem (rv64::Core)
• DZ (rv64::csr_fcsr)
• dummy_byte_ (simtix::ToTlm)

e

• enable_log (cp::GDBStub)
• enable_trace (rv64::Core)
• exception_code (rv64::csr_mcause)
• extensions (rv64::csr_misa)

f

• from_ (dbg::Monitor)
• fw_queue_ (ipc::BaseAgent)
• fw_queue (ipc::Server)
• fflags (rv64::csr_fcsr)
• fields (rv64::csr_fcsr, rv64::csr_mcause, rv64::csr_mcounteren, rv64::csr_mcountinhibit, rv64::csr_mie, rv64::csr_mip, rv64::csr_misa, rv64::csr_mstatus, rv64::csr_mtvec, rv64::csr_mvendorid, rv64::csr_pmpaddr, rv64::csr_satp)
• frm (rv64::csr_fcsr)
• fs (rv64::csr_mstatus)
• fcsr (rv64::csr_table)
• file_ (simple::PrintBuf)
• fifo_size_ (simtix::ToTlm)

g

• gen_to_arm_map_ (GToA)
• gtoa_ (simple::Initiator)

i

• initiator_ (AToG, GToA)
• irq_i_ (ipc::TimingAgent)
• instr (rv64::Core, rv64::Instruction)
• instr_mem (rv64::Core)
• interrupt (rv64::csr_mcause)
• IR (rv64::csr_mcounteren, rv64::csr_mcountinhibit)
• instret (rv64::csr_table)
• is_write (simtix::ToTlm::Request)

l

• load_time_us_ (lua::Ctor)
• last_pc (rv64::Core)
• latency_ (simple::Memory)

m

• mutex_ (MsgQueue, ThreadSafeMap)
• map_ (ThreadSafeMap)
• mem_if (cp::CommandProcessor)
• mem_port_ (cp::TLM_MemIF, dbg::MemoryDebugger, ipc::DbgAgent, ipc::TimingAgent, simple::Initiator, simtix::ToTlm)
• msgid (ipc::BaseAgent::MsgInfo, ipc::BaseAgent::TrunkInfo)
• msg_info_map_ (ipc::BaseAgent)
• mtval (rv64::SimulationTrap, rv64::csr_table)
• meie (rv64::csr_mie)
• msie (rv64::csr_mie)
• mtie (rv64::csr_mie)
• meip (rv64::csr_mip)
• msip (rv64::csr_mip)
• mtip (rv64::csr_mip)
• mxl (rv64::csr_misa)
• mie (rv64::csr_mstatus, rv64::csr_table)
• mpie (rv64::csr_mstatus)
• mpp (rv64::csr_mstatus)
• mprv (rv64::csr_mstatus)
• mxr (rv64::csr_mstatus)
• mode (rv64::csr_mtvec, rv64::csr_satp)
• marchid (rv64::csr_table)
• mcause (rv64::csr_table)
• mcounteren (rv64::csr_table)
• mcountinhibit (rv64::csr_table)
• medeleg (rv64::csr_table)
• mepc (rv64::csr_table)
• mhartid (rv64::csr_table)
• mideleg (rv64::csr_table)
• mimpid (rv64::csr_table)
• mip (rv64::csr_table)
• misa (rv64::csr_table)
• mscratch (rv64::csr_table)
• mstatus (rv64::csr_table)
• mtvec (rv64::csr_table)
• mvendorid (rv64::csr_table)
• mem_ (simple::Memory)

n

• need_resp (cp::GDBStub)
• num_modules_ (lua::Ctor)
• NV (rv64::csr_fcsr)
• NX (rv64::csr_fcsr)
• num_entries_ (simple::PrintBuf)
• next_level_ (simtix::FromTlm)

o

• op (rv64::Core)
• OF (rv64::csr_fcsr)
• offset (rv64::csr_mvendorid)
• on_resp (simtix::ToTlm::Request)

p

• peq_ (AToG, GToA, ipc::TimingAgent, simple::Initiator, simtix::ToTlm)
• payload_data_map_ (ipc::BaseAgent, simple::Initiator)
• payload_q_ (ipc::BaseAgent, simple::Initiator)
• pool_ (mm::Simple)
• pc (rv64::Core)
• prv (rv64::Core)
• pending (rv64::PendingInterrupts)
• ppn (rv64::csr_satp)
• pmpaddr (rv64::csr_table)
• pmpcfg (rv64::csr_table)
• port_ (simple::Memory, simple::PrintBuf, simtix::FromTlm)
• payload (simtix::ToTlm::Request)

q

• queue_ (MsgQueue)

r

• read_state_ (AToG, GToA)
• req_payload_ (AToG)
• resp_gen_payload_ (AToG)
• resp_queue_ (AToG)
• resp_to_send_ (AToG)
• req_queue_ (GToA)
• resp_payload_ (GToA)
• req_ack_ (cp::TLM_MemIF)
• resp_recv_ (cp::TLM_MemIF)
• running_ (ipc::Server)
• regs (rv64::Core, rv64::RegFile)
• reason (rv64::SimulationTrap)
• reg (rv64::csr_64, rv64::csr_fcsr, rv64::csr_mcause, rv64::csr_mcounteren, rv64::csr_mcountinhibit, rv64::csr_mepc, rv64::csr_mie, rv64::csr_mip, rv64::csr_misa, rv64::csr_mstatus, rv64::csr_mtvec, rv64::csr_mvendorid, rv64::csr_pmpaddr, rv64::csr_pmpcfg, rv64::csr_satp)
• reserved (rv64::csr_fcsr, rv64::csr_mcounteren, rv64::csr_mcountinhibit)
• register_mapping (rv64::csr_table)
• read_data_ (simple::Initiator)
• req_fifo_ (simple::Memory, simple::PrintBuf, simtix::FromTlm, simtix::ToTlm)
• resp_end_event_ (simple::Memory, simple::PrintBuf, simtix::FromTlm)
• resp_fifo_ (simple::Memory, simple::PrintBuf, simtix::FromTlm, simtix::ToTlm)
• req_map_ (simtix::ToTlm)

s

• stub (cp::CommandProcessor)
• server_fd (cp::GDBStub)
• start_offset (ipc::BaseAgent::MsgInfo)
• server_ (ipc::BaseAgent)
• socket_path_ (ipc::BaseAgent, ipc::Server)
• socket_fd_ (ipc::Server)
• shall_exit (rv64::Core)
• single_step (rv64::Core)
• status (rv64::Core)
• seie (rv64::csr_mie)
• ssie (rv64::csr_mie)
• stie (rv64::csr_mie)
• seip (rv64::csr_mip)
• ssip (rv64::csr_mip)
• stip (rv64::csr_mip)
• sd (rv64::csr_mstatus)
• sie (rv64::csr_mstatus)
• spie (rv64::csr_mstatus)
• spp (rv64::csr_mstatus)
• sum (rv64::csr_mstatus)
• sxl (rv64::csr_mstatus)
• satp (rv64::csr_table)
• scause (rv64::csr_table)
• scounteren (rv64::csr_table)
• sedeleg (rv64::csr_table)
• sepc (rv64::csr_table)
• sideleg (rv64::csr_table)
• sscratch (rv64::csr_table)
• stval (rv64::csr_table)
• stvec (rv64::csr_table)
• size_ (simple::Memory)

t

• target_ (AToG, GToA, cp::CommandProcessor, dbg::MemoryDebugger, dbg::Monitor, ipc::DbgAgent, ipc::TimingAgent, simple::Initiator, simtix::ToTlm)
• to_ (dbg::Monitor)
• trunks (ipc::BaseAgent::MsgInfo)
• trunks_acked (ipc::BaseAgent::MsgInfo)
• trunkid (ipc::BaseAgent::TrunkInfo)
• trunk_info_map_ (ipc::BaseAgent)
• timeout_ (ipc::Server)
• target_ready_ (ipc::TimingAgent, simple::Initiator, simtix::ToTlm)
• target_mode (rv64::PendingInterrupts)
• TM (rv64::csr_mcounteren)
• tsr (rv64::csr_mstatus)
• tvm (rv64::csr_mstatus)
• tw (rv64::csr_mstatus)
• time (rv64::csr_table)
• table (simtix::from_table_t)

u

• UF (rv64::csr_fcsr)
• ueie (rv64::csr_mie)
• usie (rv64::csr_mie)
• utie (rv64::csr_mie)
• ueip (rv64::csr_mip)
• usip (rv64::csr_mip)
• utip (rv64::csr_mip)
• uie (rv64::csr_mstatus)
• upie (rv64::csr_mstatus)
• uxl (rv64::csr_mstatus)
• ucause (rv64::csr_table)
• uepc (rv64::csr_table)
• uscratch (rv64::csr_table)
• utval (rv64::csr_table)
• utvec (rv64::csr_table)

w

• write_state_ (AToG, GToA)
• wpri1 (rv64::csr_mie, rv64::csr_mstatus)
• wpri2 (rv64::csr_mie, rv64::csr_mstatus)
• wpri3 (rv64::csr_mie, rv64::csr_mstatus)
• wpri4 (rv64::csr_mie, rv64::csr_mstatus)
• wiri1 (rv64::csr_mip)
• wiri2 (rv64::csr_mip)
• wiri3 (rv64::csr_mip)
• wiri4 (rv64::csr_mip)
• wiri (rv64::csr_misa)
• wpri5 (rv64::csr_mstatus)

x

• xs (rv64::csr_mstatus)

z

• zero (rv64::csr_mcountinhibit, rv64::csr_pmpaddr)

_

• _ (rv64::csr_fcsr)
• _unused (rv64::csr_mvendorid)

@

• @39 (rv64::csr_fcsr)
• @22 (rv64::csr_mcause)
• @25 (rv64::csr_mcounteren)
• @28 (rv64::csr_mcountinhibit)
• @20 (rv64::csr_mepc)
• @14 (rv64::csr_mie)
• @17 (rv64::csr_mip)
• @1 (rv64::csr_misa)
• @8 (rv64::csr_mstatus)
• @11 (rv64::csr_mtvec)
• @5 (rv64::csr_mvendorid)
• @33 (rv64::csr_pmpaddr)
• @31 (rv64::csr_pmpcfg)
• @36 (rv64::csr_satp)